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US5262664A Expired / Lapsed US ⏱️ 0.0 years remaining

Process for formation of LDD transistor, and structure thereof

Assignee: SK Hynix Inc
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Filing: 1993-01-22
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Granted: 1993-11-16
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Expires: 2013-01-22
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Abstract

Abstract A process for formation of an LDD transistor and a structure thereof are disclosed in which the junction capacitance and the body effect can be properly reduced. In the conventional LDD transistors, the punch-through problem is serious, and in the improved conventional LDD transistor also, there is a limit in increaseing the channel concentration, as well as the body effect being increased. The present invention gives solutions to the above problems by arranging that the junction thicknesses of n + source and drain become smaller than the junction thicknesses of n - regions, and that a p type pocket 6 be formed only near a gate and a p type pocket 6.

Inventors

  • 👤 Goo Jung-Suk

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 20:07
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D30/00; H10D30/01; H10D30/021; H10D30/0218; H10D30/022; H10D30/0223; H10D30/0227; H10D30/60; H10D62/17; H10D62/213; H10D62/221; H10D62/235; H10D62/299; H10D62/307; H10D62/351; H10D62/357; H10D62/364; H10D62/371; H10D64/00; H10D64/20; H10D64/23; H10D64/251; H10D64/258; H10D64/259; H10D64/01; H10D64/017

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 154 words
A structure of an LDD transistor comprising: a p-type substrate; a field oxide layer formed on a first surface of said p-type substrate; a gate oxide layer and a gate poly formed on said first surface of p-type substrate; poly formed on said first surface of p-type substrate at both sides of said gate poly at intervals with said gate poly; an n + region formed in said p-type substrate underlying said poly; an n - region formed adjacent to said n + region and formed in junction depth deeper than said n + region; a p+ pocket region formed in said p-type substrate in a manner to surround only said n - region; an insulating material formed over said first surface of said p-type substrate, covering said field oxide layer, said gate oxide layer and said poly; and a metal electrode formed by drilling a contact through said insulating material over said poly.
Claim 2
Dependent Claim 154 words
A structure of an LDD transistor comprising: a p-type substrate; a field oxide layer formed on a first surface of said p-type substrate; a gate oxide layer and a gate poly formed on said first surface of p-type substrate; poly formed on said first surface of p-type substrate at both sides of said gate poly at intervals with said gate poly; an n + region formed in said p-type substrate underlying said poly; an n - region formed adjacent to said n + region and formed in junction depth deeper than said n + region; a p+ pocket region formed in said p-type substrate in a manner to surround only said n - region; an insulating material formed over said first surface of said p-type substrate, covering said field oxide layer, said gate oxide layer and said poly; and a metal electrode formed by drilling a contact through said insulating material over said poly.

References Cited (Backward Citations)

JPS62130563A Cited
US5061649A Cited
US4771014A Cited
US4968639A Cited
US5102816A Cited
US5023190A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-11-15 1997-05-17 1997-11-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-11-15 2001-05-17 2001-11-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-11-15 2005-05-17 2005-11-16 $7700.00 Window Closed / Lapsed

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