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US5260900A
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Method and apparatus for accessing non-volatile memory
Assignee: Pitney Bowes Inc
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Filing: 1991-05-03
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Granted: 1993-11-09
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Expires: 2011-05-03
Abstract
Abstract A method and system for accessing a non volatile memory for writing data therein, wherein the memory has a write accessing input. A control circuit produces successive enable signals, and a hardware device is connected to apply signal to the write accessing terminal of said memory only in response to a plurality of successive enable signals.
Inventors
- 👤 Arno Muller
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 18:32
CPC Classifications
G; G11; G11C; G11C16/00; G11C16/02; G11C16/06; G11C16/32
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
193 words
A system for accessing a memory for writing data therein, comprising a non volatile memory having an write accessing input, a microcontroller having a R/W terminal, an I/O terminal and an enable terminal, a hardware device having at least two stable states, said hardware device having a first state for blocking the application of signals to said write accessing input and a second state for permitting the application of signals to said write accessing input, and further comprising means responsive to a first and second signals output from said I/O terminal for enabling and blocking, respectively, the output of write signals from said R/W terminal, and whereby said handware device is set to said first or second states responsive to a signal at said enable terminal and first or second signals, respectively said microcontroller applying said first signal to said I/O terminal while applying an enable pulse to said enable terminal, and applying said second signal to said I/O terminal while applying a next subsequent enable signal to said enable terminal, whereby said hardware device enables the application of signals to said write accessing input only in response to two successive enable signals.
Claim 2
Independent Claim
193 words
A system for accessing a memory for writing data therein, comprising a non volatile memory having an write accessing input, a microcontroller having a R/W terminal, an I/O terminal and an enable terminal, a hardware device having at least two stable states, said hardware device having a first state for blocking the application of signals to said write accessing input and a second state for permitting the application of signals to said write accessing input, and further comprising means responsive to a first and second signals output from said I/O terminal for enabling and blocking, respectively, the output of write signals from said R/W terminal, and whereby said handware device is set to said first or second states responsive to a signal at said enable terminal and first or second signals, respectively said microcontroller applying said first signal to said I/O terminal while applying an enable pulse to said enable terminal, and applying said second signal to said I/O terminal while applying a next subsequent enable signal to said enable terminal, whereby said hardware device enables the application of signals to said write accessing input only in response to two successive enable signals.
Claim 3
Dependent Claim
13 words
The system of claim 1 wherein said hardware device is a flip flop.
References Cited (Backward Citations)
US4998203A
Cited
US5051564A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-11-08 | 1997-05-10 | 1997-11-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-11-08 | 2001-05-10 | 2001-11-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-11-08 | 2005-05-10 | 2005-11-09 | $7700.00 | Window Closed / Lapsed |