Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
126 words
A method of forming a multilayered wiring structure, comprising the steps of: forming a first conductive film for a predetermined number of lower wiring layers on a predetermined region of a semiconductor substrate; forming an insulating interlayer on said semiconductor substrate including said first conductive film; partially removing said insulating interlayer to expose said first conductive film, thereby forming an opening; forming a second conductive film for upper wiring layers on said first conductive film exposed in said opening and an upper surface of said insulating interlayer, said second conductive film being in contact with said first conductive film; and simultaneously and selectively removing said first and second conductive films to form said upper and lower wiring layers isolated in a predetermined number within the opening.
Claim 2
Independent Claim
126 words
A method of forming a multilayered wiring structure, comprising the steps of: forming a first conductive film for a predetermined number of lower wiring layers on a predetermined region of a semiconductor substrate; forming an insulating interlayer on said semiconductor substrate including said first conductive film; partially removing said insulating interlayer to expose said first conductive film, thereby forming an opening; forming a second conductive film for upper wiring layers on said first conductive film exposed in said opening and an upper surface of said insulating interlayer, said second conductive film being in contact with said first conductive film; and simultaneously and selectively removing said first and second conductive films to form said upper and lower wiring layers isolated in a predetermined number within the opening.
Claim 3
Dependent Claim
35 words
A method according to claim 1, wherein the step of simultaneously and selectively removing said first and second conductive films comprises the step of self-aligning said upper and lower wiring layers using the same pattern.
Claim 4
Dependent Claim
32 words
A method according to claim 1, wherein the step of simultaneously and selectively removing said first and second conductive films comprises the step of simultaneously processing said upper and lower wiring layers.
Claim 5
Dependent Claim
15 words
A method according to claim 1, wherein the opening is formed as a via hole.
Claim 6
Dependent Claim
26 words
A method according to claim 1, wherein a length of a prospective isolation region between said lower wiring layers is not more than about 2 μm.
Claim 7
Dependent Claim
16 words
A method according to claim 1, wherein the opening includes at least two lower wiring layers.
Claim 8
Independent Claim
150 words
A method of forming a multilayered wiring structure of a semiconductor device, comprising the steps of: forming a plurality of first conductive films each for a predetermined number of lower wiring layers in a predetermined region of a first stepped insulating film formed on a semiconductor substrate; forming an insulating interlayer on said semiconductor substrate including said plurality of first conductive films; partially removing said insulating interlayer until one of said plurality of first conductive films which is located at a lowest position is exposed, thereby forming a plurality of openings; forming a second conductive film for upper wiring layers on said insulating interlayer including said plurality of first conductive films, said second conductive film being in contact with said first conductive films; and simultaneously and selectively removing said first and second conductive films to form the upper and lower wiring layers each in a predetermined number within each opening.
Claim 9
Independent Claim
150 words
A method of forming a multilayered wiring structure of a semiconductor device, comprising the steps of: forming a plurality of first conductive films each for a predetermined number of lower wiring layers in a predetermined region of a first stepped insulating film formed on a semiconductor substrate; forming an insulating interlayer on said semiconductor substrate including said plurality of first conductive films; partially removing said insulating interlayer until one of said plurality of first conductive films which is located at a lowest position is exposed, thereby forming a plurality of openings; forming a second conductive film for upper wiring layers on said insulating interlayer including said plurality of first conductive films, said second conductive film being in contact with said first conductive films; and simultaneously and selectively removing said first and second conductive films to form the upper and lower wiring layers each in a predetermined number within each opening.
Claim 10
Dependent Claim
35 words
A method according to claim 7, wherein the step of simultaneously and selectively removing said first and second conductive films comprises the step of self-aligning said upper and lower wiring layers using the same pattern.
Claim 11
Dependent Claim
32 words
A method according to claim 7, wherein the step of simultaneously and selectively removing said first and second conductive films comprises the step of simultaneously processing said upper and lower wiring layers.
Claim 12
Dependent Claim
15 words
A method according to claim 7, wherein the opening is formed as a via hole.
Claim 13
Dependent Claim
21 words
A method according to claim 7, wherein an interval between said lower wiring layers is not more than about 2 μm.
Claim 14
Dependent Claim
26 words
A method according to claim 7, wherein a length of a prospective isolation region between said lower wiring layers is not more than about 2 μm.
Claim 15
Independent Claim
239 words
A method of forming a multilayered wiring structure of a semiconductor device, comprising the steps of: forming first and second wiring portions each having a predetermined number of lower wiring layers electrically insulated from each other and adjacent to each other, said first and second wiring portions being formed on a first stepped insulating film formed on a semiconductor substrate; forming an insulating interlayer on said semiconductor substrate including said first and second wiring portions; planarizing an upper surface of said insulating interlayer; partially removing said insulating interlayer until said first and second wiring portions are exposed, thereby forming first and second openings; forming a second insulating film on exposed surfaces of said first and second wiring portions; removing said second insulating film while leaving said second insulating film between lower wiring layers of said second wiring portion such that said second insulating film has the same level as that of said lower wiring layers; forming the first and second openings for exposing said first and second wiring portions again; forming a conductive film for upper wiring layers on an upper surface of said insulating interlayer including said first and second wiring portions such that said conductive film is in contact with said first and second wiring portions; and selectively removing said conductive film located between said lower wiring layers to form isolated upper and lower wiring layers each in a predetermined number within the first and second openings.
Claim 16
Independent Claim
239 words
A method of forming a multilayered wiring structure of a semiconductor device, comprising the steps of: forming first and second wiring portions each having a predetermined number of lower wiring layers electrically insulated from each other and adjacent to each other, said first and second wiring portions being formed on a first stepped insulating film formed on a semiconductor substrate; forming an insulating interlayer on said semiconductor substrate including said first and second wiring portions; planarizing an upper surface of said insulating interlayer; partially removing said insulating interlayer until said first and second wiring portions are exposed, thereby forming first and second openings; forming a second insulating film on exposed surfaces of said first and second wiring portions; removing said second insulating film while leaving said second insulating film between lower wiring layers of said second wiring portion such that said second insulating film has the same level as that of said lower wiring layers; forming the first and second openings for exposing said first and second wiring portions again; forming a conductive film for upper wiring layers on an upper surface of said insulating interlayer including said first and second wiring portions such that said conductive film is in contact with said first and second wiring portions; and selectively removing said conductive film located between said lower wiring layers to form isolated upper and lower wiring layers each in a predetermined number within the first and second openings.
Claim 17
Dependent Claim
19 words
A method according to claim 13, wherein the first and second openings are via holes having the same depth.
Claim 18
Dependent Claim
24 words
A method according to claim 13, wherein the step of removing said second insulating film comprises the step of etching back an entire surface.
Claim 19
Dependent Claim
27 words
A method according to claim 15, further comprising the step of forming side walls in the openings simultaneously with the step of etching back said entire surface.