US5257103A
Expired / Lapsed
US
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Method and apparatus for deinterlacing video inputs
Assignee: nView Corp
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Filing: 1992-02-05
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Granted: 1993-10-26
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Expires: 2012-02-05
Abstract
Abstract Disclosed is a method and apparatus for converting interlaced input video to a sequential output compatible with sequential input display devices. The video input is digitized and decoded so as to provide separate luminance or chrominance information for each pixel to a line buffer memory. A line derived frequency reference from the input video serves to reference a pixel clock which clocks pixel information into the memory and clocks pixel information out of the memory at twice the pixel clock rate. The decoder also digitizes the luminance/chrominance information prior to storage in the memory and, as this information is read out of the memory, it is converted back into analog data by a suitable D-A converter and then is converted into appropriate format to provide red, green and blue video output information for operating sequential input devices.
Inventors
- 👤 James H. Vogeley
- 👤 Garth S. Jones
- 👤 Kenneth Kosin
- 👤 Stephen S. Trani
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 11:28
CPC Classifications
H; H04; H04N; H04N3/00; H04N3/10; H04N3/28; H04N7/00; H04N7/01; H04N7/0117; H04N7/012; G; G09; G09G; G09G5/00; G09G5/36; G09G5/39; G09G5/395; G09G2310/00; G09G2310/02; G09G2310/0229
Claims Analysis
Total Claims: 34
Claim 1
Independent Claim
234 words
An apparatus for converting at least one interlaced video input to an output for use in a non interlaced input display device, said apparatus comprising: decoder means, responsive to said video input, for providing a vertical synchronization signal output to said display device, and for providing digitized luminance and chrominance signal outputs, a horizontal synchronization signal output, and as line derived frequency reference; clock means, responsive to said line derived frequency reference, to said horizontal synchronization signal output from said decoder means, and to a twice horizontal synchronization signal output, for providing a pixel clock output, a twice pixel clock output, a scan restart output and a twice scan restart output; dual port memory means, responsive to said pixel clock output and said scan restart output, for temporarily storing a line of data including said digitized luminance, chrominance, and horizontal synchronization signal outputs from said decoder means, where said storing is synchronized with said scan restart output, and for twice reading out as an output said stored digitized luminance, chrominance and horizontal synchronization signal outputs where said reading out is synchronized with said twice scan restart output, said twice horizontal synchronization signal output supplied to said display device and fedback to said clock means; and converter means, responsive to said twice pixel clock output and said twice luminance and chrominance output signals, for providing red, green, blue video output to said display device input.
Claim 2
Independent Claim
234 words
An apparatus for converting at least one interlaced video input to an output for use in a non interlaced input display device, said apparatus comprising: decoder means, responsive to said video input, for providing a vertical synchronization signal output to said display device, and for providing digitized luminance and chrominance signal outputs, a horizontal synchronization signal output, and as line derived frequency reference; clock means, responsive to said line derived frequency reference, to said horizontal synchronization signal output from said decoder means, and to a twice horizontal synchronization signal output, for providing a pixel clock output, a twice pixel clock output, a scan restart output and a twice scan restart output; dual port memory means, responsive to said pixel clock output and said scan restart output, for temporarily storing a line of data including said digitized luminance, chrominance, and horizontal synchronization signal outputs from said decoder means, where said storing is synchronized with said scan restart output, and for twice reading out as an output said stored digitized luminance, chrominance and horizontal synchronization signal outputs where said reading out is synchronized with said twice scan restart output, said twice horizontal synchronization signal output supplied to said display device and fedback to said clock means; and converter means, responsive to said twice pixel clock output and said twice luminance and chrominance output signals, for providing red, green, blue video output to said display device input.
Claim 3
Dependent Claim
70 words
An apparatus for converting an interlaced video input in accordance with claim 1, wherein said decoder means comprises: input converter means for converting said video input to digitized video output; and decoder means, responsive to said digitized video output, for providing a vertical synchronization signal output to said display device, and for providing digitized luminance and chrominance signal outputs, a horizontal synchronization signal output, and a line derived frequency reference.
Claim 4
Dependent Claim
128 words
An apparatus for converting an interlaced video input in accordance with claim 1, wherein said clock means comprises: clock means, responsive to said line derived frequency reference, for providing a pixel clock output and a twice pixel clock output; a horizontal synchronization signal means, responsive to said horizontal synchronization signal output from said decoder means and responsive to said pixel clock output, for conditioning said horizontal synchronization signal and for providing a scan restart signal output to said dual port memory means; and a twice horizontal synchronization signal means, responsive to a twice read horizontal synchronization signal output and responsive to said twice pixel clock output, for conditioning said twice horizontal synchronization signal and for providing a twice scan restart signal output to said dual port memory means.
Claim 5
Dependent Claim
69 words
An apparatus for converting an interlaced video input in accordance with claim 1, wherein said converter means comprises: a D-to-A converter means, responsive to said twice read digitized chrominance and luminance signal outputs and to said twice pixel clock output, for providing analog chrominance level outputs; and format converter means, responsive to said analog chrominance level outputs, for providing red, blue, green video output to said display device input.
Claim 6
Dependent Claim
85 words
An apparatus for converting an interlaced video input in accordance with claim 1, said video input having first and second interlaced fields, further including sync delay means, responsive to said vertical and horizontal synchronization signal outputs from said decoder means and said twice horizontal synchronization signal output from said dual port memory means, for delaying by at least one line said vertical synchronization signal from said decoder means for said first interlaced field and for supplying said delayed vertical synchronization signal to said display device.
Claim 7
Dependent Claim
40 words
An apparatus for converting an interlaced video input in accordance with claim 1, further including image delay means, responsive to said converter means, for delaying by at least one line said red, green, blue video output from said converter means.
Claim 8
Independent Claim
295 words
An apparatus for converting at least one interlaced video input to an output for use in a non interlaced input display device, said apparatus comprising: input converter means for converting said video input to digitized video output; decoder means, responsive to said digitized video output, for providing a vertical synchronization signal output to said display device, and for providing digitized luminance and chrominance signal outputs, a horizontal synchronization signal output, and a line derived frequency reference. clock means, responsive to said line derived frequency reference, for providing a pixel clock output and a twice pixel clock output; a horizontal synchronization signal means, responsive to said horizontal synchronization signal output from said decoder means and responsive to said pixel clock output, for conditioning said horizontal synchronization signal and for providing a scan restart signal output; a twice horizontal synchronization signal means, responsive to a twice read horizontal synchronization signal output and responsive to said twice pixel clock output, for conditioning said twice horizontal synchronization signal and for providing a twice scan restart signal output; dual port memory means, responsive to said pixel clock output, for temporarily storing a line of data including said digitized luminance, chrominance, horizontal synchronization signal outputs from said decoder means, where said storing is synchronized with said scan restart output, and for twice reading out as an output said stored digitized luminance, chrominance and horizontal synchronization signal outputs where said reading out is synchronized with said twice scan restart signal output, said twice read horizontal synchronization signal output supplied to said display device and said twice horizontal synchronization signal means; and output converter means, responsive to said twice pixel clock output and said twice read luminance and chrominance output signals, for providing red, green, blue video output to said display device input.
Claim 9
Independent Claim
295 words
An apparatus for converting at least one interlaced video input to an output for use in a non interlaced input display device, said apparatus comprising: input converter means for converting said video input to digitized video output; decoder means, responsive to said digitized video output, for providing a vertical synchronization signal output to said display device, and for providing digitized luminance and chrominance signal outputs, a horizontal synchronization signal output, and a line derived frequency reference. clock means, responsive to said line derived frequency reference, for providing a pixel clock output and a twice pixel clock output; a horizontal synchronization signal means, responsive to said horizontal synchronization signal output from said decoder means and responsive to said pixel clock output, for conditioning said horizontal synchronization signal and for providing a scan restart signal output; a twice horizontal synchronization signal means, responsive to a twice read horizontal synchronization signal output and responsive to said twice pixel clock output, for conditioning said twice horizontal synchronization signal and for providing a twice scan restart signal output; dual port memory means, responsive to said pixel clock output, for temporarily storing a line of data including said digitized luminance, chrominance, horizontal synchronization signal outputs from said decoder means, where said storing is synchronized with said scan restart output, and for twice reading out as an output said stored digitized luminance, chrominance and horizontal synchronization signal outputs where said reading out is synchronized with said twice scan restart signal output, said twice read horizontal synchronization signal output supplied to said display device and said twice horizontal synchronization signal means; and output converter means, responsive to said twice pixel clock output and said twice read luminance and chrominance output signals, for providing red, green, blue video output to said display device input.
Claim 10
Dependent Claim
22 words
An apparatus for converting an interlaced video input in accordance with claim 7, wherein said input converter means comprises an A-to-D converter.
Claim 11
Dependent Claim
44 words
An apparatus for converting an interlaced video input in accordance with claim 8, wherein a plurality of video inputs are supplied to said input converter means, said input converter means further includes video select means for selecting one of said plurality of video inputs.
Claim 12
Dependent Claim
91 words
An apparatus for converting an interlaced video input in accordance with claim 7, wherein said interlaced video is in one of SECAM, PAL, and NTSC video formats and said decoder means comprises: a chrominance/luminance/sync decoder means for providing luminance signal, vertical and horizontal synchronization signals and line derived frequency outputs for said input video and chrominance signal outputs for said input video comprising one of PAL and NTSC video formats; and a SECAM chrominance decoder for providing a chrominance signal output for said input video comprised of a SECAM video format.
Claim 13
Dependent Claim
38 words
An apparatus for converting an interlaced video input in accordance with claim 7, wherein said clock means comprises a voltage controlled oscillator, responsive to said line derived frequency reference, for providing pixel clock and twice pixel clock outputs.
Claim 14
Dependent Claim
43 words
An apparatus for converting an interlaced video input in accordance with claim 7, wherein said horizontal synchronization means and said twice horizontal synchronization means comprise first and second digital one-shot multivibrator means for providing scan restart and twice scan restart signal outputs, respectively.
Claim 15
Dependent Claim
70 words
An apparatus for converting an interlaced video input in accordance with claim 7, wherein said output converter means comprises: a D-to-A converter means, responsive to said twice read digitized chrominance and luminance signal outputs and to said twice pixel clock output, for providing analog chrominance level outputs; and format converter means, responsive to said analog chrominance level outputs, for providing red, blue, green video output to said display device input.
Claim 16
Dependent Claim
85 words
An apparatus for converting an interlaced video input in accordance with claim 7, said video input having first and second interlaced fields, further including sync delay means, responsive to said vertical and horizontal synchronization signal outputs from said decoder means and said twice horizontal synchronization signal output from said dual port memory means, for delaying by at least one line said vertical synchronization signal from said decoder means for said first interlaced field and for supplying said delayed vertical synchronization signal to said display device.
Claim 17
Dependent Claim
42 words
An apparatus for converting an interlaced video input in accordance with claim 7, further including image delay means, responsive to said output converter means, for delaying by at least one line said red, green, blue video output from said output converter means.
Claim 18
Independent Claim
483 words
An apparatus for converting an interlaced video input to an output for use in a non interlaced input display device, wherein said interlaced video is in one of SECAM, PAL, and NTSC video formats, said apparatus comprising: input converter means for converting said video input to digitized video output, wherein said input converter means comprises an A-to-D converter; decoder means, responsive to said digitized video output, for providing a vertical synchronization signal output to said display device, and for providing digitized luminance and chrominance signal outputs, a horizontal synchronization signal output, and a line derived frequency reference, said decoder means comprises: a chrominance/luminance/sync decoder means for providing luminance signal, vertical and horizontal synchronization signals and line derived frequency outputs for said input video and chrominance signal outputs for said input video comprising one of PAL and NTSC video formats; and a SECAM chrominance decoder for providing a chrominance signal output for said input video comprised of a SECAM video format; clock means, responsive to said line derived frequency reference, for providing a pixel clock output and a twice pixel clock output, wherein said clock means comprises a voltage controlled oscillator, responsive to said line derived frequency reference, for providing pixel clock and twice pixel clock outputs; a horizontal synchronization signal means, responsive to said horizontal synchronization signal output from said encoder means and responsive to said pixel clock output, for conditioning said horizontal synchronization signal and for providing a scan restart signal output, said horizontal synchronization signal means comprises a digital one-shot multivibrator; a twice horizontal synchronization signal means, responsive to a twice read horizontal synchronization signal output and responsive to said twice pixel clock output, for conditioning said twice horizontal synchronization signal and for providing a twice scan restart signal output, said twice horizontal synchronization signal means comprises a digital one-shot multivibrator; dual port memory means, responsive to said pixel clock output, for temporarily storing a line of data including said digitized luminance, chrominance, horizontal synchronization signal outputs from said decoder means, where said storing is synchronized with said scan restart signal output, and for twice reading out as an output said stored digitized luminance, chrominance and horizontal synchronization signal outputs where said reading out is synchronized with said twice scan restart signal output, said twice read horizontal synchronization signal output supplied to said display device and said twice horizontal synchronization signal means; and output converter means, responsive to said twice pixel clock output and said twice read luminance and chrominance output signals, for providing red, green, blue video output to said display device input, wherein said output converter means comprises: a D-to-A converter means, responsive to said twice read digitized chrominance and luminance signal outputs and to said twice pixel clock output, for providing analog chrominance level outputs; and format converter means, responsive to said analog chrominance level outputs, for providing red, blue, green video output to said display device input.
Claim 19
Independent Claim
483 words
An apparatus for converting an interlaced video input to an output for use in a non interlaced input display device, wherein said interlaced video is in one of SECAM, PAL, and NTSC video formats, said apparatus comprising: input converter means for converting said video input to digitized video output, wherein said input converter means comprises an A-to-D converter; decoder means, responsive to said digitized video output, for providing a vertical synchronization signal output to said display device, and for providing digitized luminance and chrominance signal outputs, a horizontal synchronization signal output, and a line derived frequency reference, said decoder means comprises: a chrominance/luminance/sync decoder means for providing luminance signal, vertical and horizontal synchronization signals and line derived frequency outputs for said input video and chrominance signal outputs for said input video comprising one of PAL and NTSC video formats; and a SECAM chrominance decoder for providing a chrominance signal output for said input video comprised of a SECAM video format; clock means, responsive to said line derived frequency reference, for providing a pixel clock output and a twice pixel clock output, wherein said clock means comprises a voltage controlled oscillator, responsive to said line derived frequency reference, for providing pixel clock and twice pixel clock outputs; a horizontal synchronization signal means, responsive to said horizontal synchronization signal output from said encoder means and responsive to said pixel clock output, for conditioning said horizontal synchronization signal and for providing a scan restart signal output, said horizontal synchronization signal means comprises a digital one-shot multivibrator; a twice horizontal synchronization signal means, responsive to a twice read horizontal synchronization signal output and responsive to said twice pixel clock output, for conditioning said twice horizontal synchronization signal and for providing a twice scan restart signal output, said twice horizontal synchronization signal means comprises a digital one-shot multivibrator; dual port memory means, responsive to said pixel clock output, for temporarily storing a line of data including said digitized luminance, chrominance, horizontal synchronization signal outputs from said decoder means, where said storing is synchronized with said scan restart signal output, and for twice reading out as an output said stored digitized luminance, chrominance and horizontal synchronization signal outputs where said reading out is synchronized with said twice scan restart signal output, said twice read horizontal synchronization signal output supplied to said display device and said twice horizontal synchronization signal means; and output converter means, responsive to said twice pixel clock output and said twice read luminance and chrominance output signals, for providing red, green, blue video output to said display device input, wherein said output converter means comprises: a D-to-A converter means, responsive to said twice read digitized chrominance and luminance signal outputs and to said twice pixel clock output, for providing analog chrominance level outputs; and format converter means, responsive to said analog chrominance level outputs, for providing red, blue, green video output to said display device input.
Claim 20
Dependent Claim
44 words
An apparatus for converting an interlaced video input in accordance with claim 16, wherein a plurality of video inputs are supplied to said input converter means, said input converter means further includes video select means for selecting one of said plurality of video inputs.
Claim 21
Dependent Claim
85 words
An apparatus for converting an interlaced video input in accordance with claim 16, said video input having first and second interlaced fields, further including sync delay means, responsive to said vertical and horizontal synchronization signal outputs from said decoder means and said twice horizontal synchronization signal output from said dual port memory means, for delaying by at least one line said vertical synchronization signal from said decoder means for said first interlaced field and for supplying said delayed vertical synchronization signal to said display device.
Claim 22
Dependent Claim
41 words
An apparatus for converting an interlaced video input in accordance with claim 16, further including image delay means, responsive to said converter means, for delaying by at least one line said red, green, blue video output from said output converter means.
Claim 23
Independent Claim
227 words
A method for converting at least one interlaced video input to an output for use in a non interlaced input display device, said method comprising the steps of: (1) providing, in response to said video input, a vertical synchronization signal output to said display device, and digitized luminance and chrominance signal outputs, a horizontal synchronization signal output, and a line derived frequency reference; (2) providing, in response to said line derived frequency reference, said horizontal synchronization signal output, and a twice horizontal synchronization signal output, (a) a pixel clock output, (b) a twice pixel clock output, (c) a scan restart output and (d) a twice scan restart output; (3) storing, in response to said pixel clock output and said scan restart output, a line of data including said digitized luminance, chrominance outputs and said horizontal synchronization signal output, where said storing step is synchronized with said scan restart output; (4) reading out twice said line of data stored as digitized luminance, and chrominance output signals, providing a twice horizontal synchronization signal output, where said reading out is synchronized with said twice scan restart output, and said twice horizontal synchronization signal output is supplied to said display device; and (5) providing, in response to said twice pixel clock output and said stored digitized luminance and chrominance output signals, red, green, blue video output to siad display device input.
Claim 24
Independent Claim
227 words
A method for converting at least one interlaced video input to an output for use in a non interlaced input display device, said method comprising the steps of: (1) providing, in response to said video input, a vertical synchronization signal output to said display device, and digitized luminance and chrominance signal outputs, a horizontal synchronization signal output, and a line derived frequency reference; (2) providing, in response to said line derived frequency reference, said horizontal synchronization signal output, and a twice horizontal synchronization signal output, (a) a pixel clock output, (b) a twice pixel clock output, (c) a scan restart output and (d) a twice scan restart output; (3) storing, in response to said pixel clock output and said scan restart output, a line of data including said digitized luminance, chrominance outputs and said horizontal synchronization signal output, where said storing step is synchronized with said scan restart output; (4) reading out twice said line of data stored as digitized luminance, and chrominance output signals, providing a twice horizontal synchronization signal output, where said reading out is synchronized with said twice scan restart output, and said twice horizontal synchronization signal output is supplied to said display device; and (5) providing, in response to said twice pixel clock output and said stored digitized luminance and chrominance output signals, red, green, blue video output to siad display device input.
Claim 25
Dependent Claim
88 words
A method for converting at least one interlaced video input in accordance with claim 20, wherein said step of providing a vertical and horizontal synchronization signal outputs and digitized luminance and chrominance signal outputs and a line derived frequency reference, comprises the steps of: (1) converting said video input to digitized video output; (2) decoding said digitized video output, providing a vertical synchronization signal output to said display device, and providing digitized luminance and chrominance signal outputs, a horizontal synchronization signal output, and a line derived frequency reference.
Claim 26
Dependent Claim
123 words
A method for converting at least one interlaced video input in accordance with claim 20, wherein said step of providing (a) a pixel clock output, (b) a twice pixel clock output, (c) a scan restart output and (d) a twice scan restart output includes the steps of: providing, in response to said line derived frequency reference, a pixel clock output, and a twice pixel clock output; conditioning said horizontal synchronization signal output, in response to said horizontal synchronization signal output and said pixel clock output, and providing a scan restart signal output; and conditioning said twice horizontal synchronization signal output, in response to said twice horizontal synchronization signal output and said twice pixel clock output, and providing a twice scan restart signal output.
Claim 27
Dependent Claim
76 words
A method for converting at least one interlaced video input in accordance with claim 20, wherein said providing red, green, blue video output step comprises the steps of: converting said stored digitized chrominance and luminance signal outputs, in response to said twice pixel clock output, to analog chrominance level outputs; and converting said analog chrominance level outputs to a red, blue, green video output; and providing said red, blue, green video output to said display device.
Claim 28
Independent Claim
262 words
A method for converting at least one interlaced video input to an output for use in a non interlaced input display device, said method comprising the steps of: (1) converting said video input to digitized video output; (2) decoding said digitized video output, providing a vertical synchronization signal output to said display device, and providing digitized luminance and chrominance signal outputs, a horizontal synchronization signal output, and a line derived frequency reference. (3) providing, in response to said line derived frequency reference, a pixel clock output and a twice pixel clock output; (4) conditioning said horizontal synchronization signal output, in response to said horizontal synchronization signal output and said pixel clock output, and providing a scan restart signal output; (5) conditioning said twice horizontal synchronization signal output, in response to said twice horizontal synchronization signal output and said twice pixel clock output, and providing a twice scan restart signal output; (6) temporarily storing, in response to said pixel clock output, a line of data including said digitized luminance, chrominance, horizontal synchronization signal outputs, where said temporary storing step is synchronized with said scan restart signal output; (7) reading out twice said line of data stored as digitized luminance and chrominance output signals, providing a horizontal synchronization signal output, where said reading out is synchronized with said twice scan restart signal output, said twice horizontal synchronization signal output supplied to said display device; and (8) providing, in response to said twice pixel clock output and said stored digitized luminance and chrominance output signals, red, green, blue video output to said display device input.
Claim 29
Independent Claim
262 words
A method for converting at least one interlaced video input to an output for use in a non interlaced input display device, said method comprising the steps of: (1) converting said video input to digitized video output; (2) decoding said digitized video output, providing a vertical synchronization signal output to said display device, and providing digitized luminance and chrominance signal outputs, a horizontal synchronization signal output, and a line derived frequency reference. (3) providing, in response to said line derived frequency reference, a pixel clock output and a twice pixel clock output; (4) conditioning said horizontal synchronization signal output, in response to said horizontal synchronization signal output and said pixel clock output, and providing a scan restart signal output; (5) conditioning said twice horizontal synchronization signal output, in response to said twice horizontal synchronization signal output and said twice pixel clock output, and providing a twice scan restart signal output; (6) temporarily storing, in response to said pixel clock output, a line of data including said digitized luminance, chrominance, horizontal synchronization signal outputs, where said temporary storing step is synchronized with said scan restart signal output; (7) reading out twice said line of data stored as digitized luminance and chrominance output signals, providing a horizontal synchronization signal output, where said reading out is synchronized with said twice scan restart signal output, said twice horizontal synchronization signal output supplied to said display device; and (8) providing, in response to said twice pixel clock output and said stored digitized luminance and chrominance output signals, red, green, blue video output to said display device input.
Claim 30
Dependent Claim
39 words
A method for converting at least one interlaced video input in accordance with claim 24, wherein a plurality of video inputs are supplied and said converting step includes the step of selecting one of said plurality of video inputs.
Claim 31
Dependent Claim
66 words
A method for converting at least one interlaced video input in accordance with claim 24, wherein said interlaced video is in one of SECAM, PAL, and NTSC video formats and said decoding step comprises the step of providing digitized luminance and chrominance signals, vertical and horizontal synchronization signals and line derived frequency outputs for said input video comprising one of SECAM, PAL and NTSC video formats.
Claim 32
Dependent Claim
76 words
A method for converting at least one interlaced video input in accordance with claim 24, wherein said providing red, green, blue video output step comprises the steps of: converting said stored digitized chrominance and luminance signal outputs, in response to said twice pixel clock output, to analog chrominance level outputs; and converting said analog chrominance level outputs to a red, blue, green video output; and providing said red, blue, green video output to said display device.
Claim 33
Dependent Claim
80 words
A method for converting at least one interlaced video input in accordance with claim 24, wherein said video input having first and second interlaced fields, further including after said reading out step and in response to said vertical and horizontal synchronization signal outputs and said twice horizontal synchronization signal output, the steps of: delaying by at least one line said vertical synchronization signal for said first interlaced field; and for supplying said delayed vertical synchronization signal to said display device.
Claim 34
Dependent Claim
55 words
A method for converting at least one interlaced video input in accordance with claim 24, wherein in response to said stored digitized luminance and chrominance output signals, said providing red, green, blue video output step includes the step of delaying by at least one line said red, green, blue video output to said display device.
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USPTO Annuity & Maintenance Windows
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| 3.5 Years (Year 4) | 1996-10-25 | 1997-04-26 | 1997-10-26 | $2000.00 | Window Closed / Lapsed |
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