US5253156A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor integrated circuit unit
Assignee: Hitachi Ltd
•
Filing: 1991-01-29
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Granted: 1993-10-12
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Expires: 2011-01-29
Abstract
Abstract A semiconductor integrated circuit unit, suitable for the control of a motor, has an integrated structure within the same semiconductor substrate, comprising an inverter circuit, drive circuits for driving the switching elements of the inverter circuit, an internal power source circuit for supplying power to the drive circuits which drive the upper arm side of the inverter circuit, and a logical circuit for transmitting a signal to the drive circuits which drive the upper arm side of the inverter circuit.
Inventors
- 👤 Naoki Sakurai
- 👤 Mutsuhiro Mori
- 👤 Hidetoshi Arakawa
- 👤 Kenichi Onda
- 👤 Hideki Miyazaki
- 👤 Akihiko Kanouda
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 16:54
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/124; H10D62/126; H10D62/127; H02; H02M; H02M7/00; H02M7/003; H02M7/42; H02M7/44; H02M7/48; H02M7/53; H02M7/537; H02M7/5387; H02P; H02P6/00; H02P6/08; H02P6/085; H10D12/00; H10D12/411; H10D12/421; H10D12/441; H10D12/491; H10D8/00; H10D8/60; H10D84/00; H10D84/40; H10D84/401; H10D84/403; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/019; H10W10/10
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
447 words
A semiconductor integrated circuit characterized in that there are integrally formed within the same semiconductor substrate: a pair of DC terminals; a plurality of AC terminals equal in number to the number of phase of an AC power supply; a pair of auxiliary DC terminals; a control terminal; an inverter circuit including a plurality of inverter units connected in parallel to each other between said pair of DC terminals, said inverter units being equal in number to the number of phases of the AC power supply, each of said inverter units having two serially connected circuit element pairs each circuit element pair having an inverse-parallel-connected switching element and a diode, a middle point of said each inverter unit being connected to a corresponding one of said plurality of AC terminals; a first plurality of driving circuit for respectively driving the switching elements at one side of the inverter units of said inverter circuits; a second plurality of driving circuit receiving a power supply from said pair of auxiliary DC terminals, for respectively driving the switching elements at the other side of the inverter units of said inverter circuit; a logical circuit connected to receive a control signal from said control terminal, for transmitting the control signal to said first plurality of driving circuits and to said second plurality of driving circuits; a plurality of level shift circuits respectively interposed between said first plurality of driving circuits and said logical circuit; and an internal power supply circuit connected to said pair of auxiliary DC terminals for supplying power to said first plurality of driving circuits, wherein said semiconductor substrate has a rectangular main surface enclosed by first and second sides extending in parallel to each other and third and fourth sides extending in parallel to each other and intersecting said first and second side orthogonally, wherein said switching elements are arranged apart from said first side of said rectangular main surface and in a same direction as said first side, wherein said diodes are arranged between said first side of said rectangular main surface and a row of said switching elements, and arranged in a same direction as said first side, wherein said first plurality of driving circuits, said second plurality of driving circuits, and said plurality of level shift circuits are arranged between said second side of said rectangular main surface and the row of said switching elements, and arranged in a same direction as said second side, and wherein said logical circuit and said internal power supply circuit are arranged between said second side of said rectangular main surface and a row of said driving circuits, and arranged in a same direction as said second side.
Claim 2
Dependent Claim
447 words
A semiconductor integrated circuit characterized in that there are integrally formed within the same semiconductor substrate: a pair of DC terminals; a plurality of AC terminals equal in number to the number of phase of an AC power supply; a pair of auxiliary DC terminals; a control terminal; an inverter circuit including a plurality of inverter units connected in parallel to each other between said pair of DC terminals, said inverter units being equal in number to the number of phases of the AC power supply, each of said inverter units having two serially connected circuit element pairs each circuit element pair having an inverse-parallel-connected switching element and a diode, a middle point of said each inverter unit being connected to a corresponding one of said plurality of AC terminals; a first plurality of driving circuit for respectively driving the switching elements at one side of the inverter units of said inverter circuits; a second plurality of driving circuit receiving a power supply from said pair of auxiliary DC terminals, for respectively driving the switching elements at the other side of the inverter units of said inverter circuit; a logical circuit connected to receive a control signal from said control terminal, for transmitting the control signal to said first plurality of driving circuits and to said second plurality of driving circuits; a plurality of level shift circuits respectively interposed between said first plurality of driving circuits and said logical circuit; and an internal power supply circuit connected to said pair of auxiliary DC terminals for supplying power to said first plurality of driving circuits, wherein said semiconductor substrate has a rectangular main surface enclosed by first and second sides extending in parallel to each other and third and fourth sides extending in parallel to each other and intersecting said first and second side orthogonally, wherein said switching elements are arranged apart from said first side of said rectangular main surface and in a same direction as said first side, wherein said diodes are arranged between said first side of said rectangular main surface and a row of said switching elements, and arranged in a same direction as said first side, wherein said first plurality of driving circuits, said second plurality of driving circuits, and said plurality of level shift circuits are arranged between said second side of said rectangular main surface and the row of said switching elements, and arranged in a same direction as said second side, and wherein said logical circuit and said internal power supply circuit are arranged between said second side of said rectangular main surface and a row of said driving circuits, and arranged in a same direction as said second side.
Claim 3
Dependent Claim
26 words
A semiconductor integrated circuit according to claim 1, wherein each of said diodes has a rectification junction formed by a pn junction and a Schottky junction.
Claim 4
Dependent Claim
46 words
A semiconductor integrated circuit according to claim 1, further comprising a current detecting circuit for detecting a current flowing through the switching element at the other side of said each inverter unit of said inverter circuit and for supplying a detection signal to said logical circuit.
Claim 5
Dependent Claim
25 words
A semiconductor integrated circuit according to claim 1, wherein each of the switching elements of said inverter circuit is a lateral insulation gate bipolar transistor.
Claim 6
Dependent Claim
17 words
A semiconductor integrated circuit according to claim 1, wherein the semiconductor substrate is a dielectric isolated substrate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-10-11 | 1997-04-12 | 1997-10-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-10-11 | 2001-04-12 | 2001-10-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-10-11 | 2005-04-12 | 2005-10-12 | $7700.00 | Window Closed / Lapsed |