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US5251107A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor package

Assignee: Mitsubishi Electric Corp
•
Filing: 1991-11-27
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Granted: 1993-10-05
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Expires: 2011-11-27
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Abstract

Abstract A quadrate semiconductor element in the form of a quad flat package, a bare chip, and the like mounted on a substrate has a plurality of first terminals electrically connected through connecting wires to corresponding second terminals which are disposed on the substrate around the semiconductor element. The second terminals are disposed on the substrate such that the number of second terminals per unit area is less at locations near the corners of the quadrate semiconductor element than at the other portions of the substrate. This arrangement enlarges the effective wiring area for the connecting wires at the corners, thus greatly improving wiring efficiency.

Inventors

  • 👤 Seiji Takemura
  • 👤 Masataka Kawai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 19:27
CPC Classifications
H; H10; H10W; H10W90/00; H10W90/701; H10W70/00; H10W70/60; H10W70/62; H10W70/65; H10W72/00; H10W72/50; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/5522; H10W90/751; H10W90/754

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 160 words
A semiconductor package mounting comprising: a substrate having a rectangular shape including four sides and four corners and four connector land arrays, each land array comprising a plurality of discrete electrically conductive connector lands disposed substantially along a straight line parallel to a corresponding side of said substrate; a semiconductor chip having a rectangular configuration including four sides and four corners, and a plurality of first terminals disposed along the four sides of said semiconductor chip, said semiconductor chip being mounted on said substrate with respective sides of said semiconductor chip aligned with corresponding sides of said substrate; and a plurality of second terminals disposed on said substrate surrounding said semiconductor chip wherein each of said connector lands is electrically connected to a respective first terminal and to a corresponding second terminal on said substrate, and the number of second terminals per unit area is smaller near the corners of said substrate than remote from the corners of said substrate.
Claim 2
Dependent Claim 160 words
A semiconductor package mounting comprising: a substrate having a rectangular shape including four sides and four corners and four connector land arrays, each land array comprising a plurality of discrete electrically conductive connector lands disposed substantially along a straight line parallel to a corresponding side of said substrate; a semiconductor chip having a rectangular configuration including four sides and four corners, and a plurality of first terminals disposed along the four sides of said semiconductor chip, said semiconductor chip being mounted on said substrate with respective sides of said semiconductor chip aligned with corresponding sides of said substrate; and a plurality of second terminals disposed on said substrate surrounding said semiconductor chip wherein each of said connector lands is electrically connected to a respective first terminal and to a corresponding second terminal on said substrate, and the number of second terminals per unit area is smaller near the corners of said substrate than remote from the corners of said substrate.
Claim 3
Dependent Claim 29 words
The semiconductor package mounting according to claim 1 wherein said second terminals are disposed in a regular grid pattern on said substrate except near the corners of said substrate.
Claim 4
Dependent Claim 25 words
The semiconductor package mounting according to claim 1 wherein said second terminals are missing from the regular grid pattern near the corners of said substrate.
Claim 5
Dependent Claim 54 words
The semiconductor package mounting according to claim 1 wherein said second terminals are a plurality of rows of connector pins disposed in a regular grid pattern with each row extending along a corresponding connector land array, some positions of said grid pattern near opposite ends of each connector land array not including second terminals.
Claim 6
Dependent Claim 34 words
The semiconductor package mounting according to claim 1 wherein at least one row of said second terminals is disposed on the opposite side of one of said connector land arrays from said semiconductor chip.
Claim 7
Dependent Claim 30 words
The semiconductor package mounting according to claim 5 wherein at least one row of said second terminals is disposed between one of said connector land arrays and said semiconductor chip.

References Cited (Backward Citations)

US4618739A Cited
US4822550A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-10-04 1997-04-05 1997-10-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-10-04 2001-04-05 2001-10-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-10-04 2005-04-05 2005-10-05 $7700.00 Window Closed / Lapsed

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