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US5250846A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device with multi-layer leads

Assignee: Seiko Epson Corp
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Filing: 1991-08-09
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Granted: 1993-10-05
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Expires: 2011-08-09
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Abstract

Abstract A semiconductor device having multi-layered leads having a first lead portion including a polycrystalline silicon layer and a titanium silicide layer, and a second lead portion formed over the first lead portion and made up of a polycrystalline silicon layer. An intermediate insulating layer is provided between the first and second lead portions. The intermediate insulation layer and the underlying titanium silicide layer are provided with contact holes aligned with each other so as to allow the polycrystalline silicon of the second lead portion to be in direct contact with the polycrystalline silicon layer of the first lead portion without interposing therebetween the titanium silicide layer at the contact hole portion.

Inventors

  • 👤 Toshihiko Kondo

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 21:12
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4451; H10W20/42

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 190 words
A semiconductor device comprising: a substrate a first lead layer comprising a polycrystalline silicon layer containing impurities and carried by the substrate, and a titanium silicide layer formed over at least part of the polycrystalline silicon layer; an intermediate insulating layer formed on the first lead layer, the intermediate insulating layer having a thickness dimension and being formed with a contact hole penetrating through the thickness dimension thereof, the contact hole enclosing a contact area; and a second lead layer comprising a layer of polycrystalline silicon and an upper layer of a refractory metal or a refractory metal silicide overlying said polycrystalline silicon layer of said second lead layer, said second lead layer being formed over the intermediate insulating layer, with polycrystalline silicon of the second lead layer extending into the contact hole to contact the polycrystalline silicon layer of the first lead layer, wherein the titanium silicide layer is not present in the contact area enclosed by the contact hole for permitting direct contact of the polycrystalline silicon layer of the first lead layer with the polycrystalline silicon of the second lead layer which extends into the contact hole.
Claim 2
Dependent Claim 190 words
A semiconductor device comprising: a substrate a first lead layer comprising a polycrystalline silicon layer containing impurities and carried by the substrate, and a titanium silicide layer formed over at least part of the polycrystalline silicon layer; an intermediate insulating layer formed on the first lead layer, the intermediate insulating layer having a thickness dimension and being formed with a contact hole penetrating through the thickness dimension thereof, the contact hole enclosing a contact area; and a second lead layer comprising a layer of polycrystalline silicon and an upper layer of a refractory metal or a refractory metal silicide overlying said polycrystalline silicon layer of said second lead layer, said second lead layer being formed over the intermediate insulating layer, with polycrystalline silicon of the second lead layer extending into the contact hole to contact the polycrystalline silicon layer of the first lead layer, wherein the titanium silicide layer is not present in the contact area enclosed by the contact hole for permitting direct contact of the polycrystalline silicon layer of the first lead layer with the polycrystalline silicon of the second lead layer which extends into the contact hole.
Claim 3
Dependent Claim 242 words
A semiconductor device comprising: a substrate; a first lead layer comprising a polycrystalline silicon layer comprising impurities and carried by the substrate, the polycrystalline silicon layer having a portion defining a contact region, and a titanium silicide layer formed over at least part of the polycrystalline silicon layer outside of the contact region; an oxide film layer provided on the contact region of the polycrystalline silicon layer of the first lead layer; an intermediate insulating layer formed on the first lead layer, the intermediate insulating layer having a thickness dimension, the oxide film layer and the intermediate insulating layer being formed with a contact hole penetrating through the thickness dimension of the intermediate insulating layer and through the oxide film layer, and the contact hole enclosing a contact area within the contact region; and a second lead layer comprising a layer of polycrystalline silicon and formed over the intermediate insulating layer and the oxide film layer, with polycrystalline silicon of the second lead layer extending into the contact hole to contact the polycrystalline silicon layer of the first lead layer, wherein the titanium silicide layer is not present in the contact area enclosed by the contact hole for permitting direct contact of the polycrystalline silicon layer of the first lead layer with the polycrystalline silicon of the second lead layer which extends into the contact hole, and the oxide film layer is interposed between the contact hole and the titanium silicide layer.
Claim 4
Dependent Claim 242 words
A semiconductor device comprising: a substrate; a first lead layer comprising a polycrystalline silicon layer comprising impurities and carried by the substrate, the polycrystalline silicon layer having a portion defining a contact region, and a titanium silicide layer formed over at least part of the polycrystalline silicon layer outside of the contact region; an oxide film layer provided on the contact region of the polycrystalline silicon layer of the first lead layer; an intermediate insulating layer formed on the first lead layer, the intermediate insulating layer having a thickness dimension, the oxide film layer and the intermediate insulating layer being formed with a contact hole penetrating through the thickness dimension of the intermediate insulating layer and through the oxide film layer, and the contact hole enclosing a contact area within the contact region; and a second lead layer comprising a layer of polycrystalline silicon and formed over the intermediate insulating layer and the oxide film layer, with polycrystalline silicon of the second lead layer extending into the contact hole to contact the polycrystalline silicon layer of the first lead layer, wherein the titanium silicide layer is not present in the contact area enclosed by the contact hole for permitting direct contact of the polycrystalline silicon layer of the first lead layer with the polycrystalline silicon of the second lead layer which extends into the contact hole, and the oxide film layer is interposed between the contact hole and the titanium silicide layer.
Claim 5
Dependent Claim 31 words
The semiconductor device as claimed in claim 2 wherein the semiconductor device has a gate electrode formed on the substrate and constituting the polycrystalline silicon layer of the first lead layer.
Claim 6
Dependent Claim 37 words
The semiconductor device as claimed in claim 3 wherein the second lead layer further comprises an upper layer of a refractory metal or a refractory metal silicide overlying said polycrystalline silicon layer of said second lead layer.
Claim 7
Dependent Claim 34 words
The semiconductor device is claimed in claim 2 wherein the semiconductor device has a layer into which impurities are diffused in the substrate and constituting the polycrystalline silicon layer of the first lead layer.
Claim 8
Dependent Claim 37 words
The semiconductor device as claimed in claim 5 wherein the second lead layer further comprises an upper layer of a refractory metal or a refractory metal silicide overlying said polycrystalline silicon layer of said second lead layer.
Claim 9
Dependent Claim 37 words
The semiconductor device as claimed in claim 2 wherein the second lead layer further comprises an upper layer of a refractory metal or a refractory metal silicide overlying said polycrystalline silicon layer of said second lead layer.

References Cited (Backward Citations)

JPH02151040A Cited
JPH02192140A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-10-04 1997-04-05 1997-10-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-10-04 2001-04-05 2001-10-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-10-04 2005-04-05 2005-10-05 $7700.00 Window Closed / Lapsed

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