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US5250841A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor device with test-only leads

Assignee: Motorola Solutions Inc
•
Filing: 1993-01-21
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Granted: 1993-10-05
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Expires: 2013-01-21
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Abstract

Abstract A semiconductor device (10) includes test-only leads (20) and operational leads (18). Operational leads (18) provide access to portions of a semiconductor die (12) needed for device operation. Test-only leads (20) provide access to portions of die (12) which are not needed for device operation, but which are needed during manufacturing tests. Operational leads (18) have an external configuration which facilitates attachment to a user substrate. Test-only leads (20) have an external configuration which enables electrical access to the device for test purposes; however, the test-only lead configuration makes attachment to the user substrate difficult. Since the test-only leads (20) and the operational leads (18) have two different external lead configurations, overall lead pitch is reduced, enabling device (10) to be made very small. Yet, complexity of mounting device (10) to a user substrate is not increased since the pitch between adjacent operational leads (18) can be made larger than the overall lead pitch.

Inventors

  • 👤 James W. Sloan
  • 👤 Timothy J. Mennitt
  • 👤 John P. Warren

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 07:15
CPC Classifications
H; H10; H10P; H10P74/00; H10P74/27; H10P74/273; H10W; H10W70/00; H10W70/40; H10W70/411; H10W70/415; H10W70/421; H10W72/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/073; H10W72/07351; H10W72/07352; H10W72/20; H10W72/30; H10W72/321; H10W72/50; H10W72/531; H10W72/536; H10W72/5363; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/851; H10W72/853; H10W72/865; H10W90/00; H10W90/701; H10W90/721; H10W90/726; H10W90/731; H10W90/736; H10W90/751; H10W90/756

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 134 words
A semiconductor device comprising: a semiconductor die having an integrated circuit formed thereon, a first plurality of bond pads electrically coupled to operational portions of the integrated circuit, and a second plurality of bond pads electrically coupled to test portions of the integrated circuit; a first plurality of conductive leads electrically coupled to the first plurality of bond pads, each lead of the first plurality of leads being configured for connection to a user substrate; and a second plurality of conductive leads electrically coupled to the second plurality of bond pads, each lead of the second plurality of leads being configured for testing of the device and being configured such that connection to the user substrate is impeded, and wherein the second plurality of leads is singularly interdigitated among the first plurality of leads.
Claim 2
Dependent Claim 134 words
A semiconductor device comprising: a semiconductor die having an integrated circuit formed thereon, a first plurality of bond pads electrically coupled to operational portions of the integrated circuit, and a second plurality of bond pads electrically coupled to test portions of the integrated circuit; a first plurality of conductive leads electrically coupled to the first plurality of bond pads, each lead of the first plurality of leads being configured for connection to a user substrate; and a second plurality of conductive leads electrically coupled to the second plurality of bond pads, each lead of the second plurality of leads being configured for testing of the device and being configured such that connection to the user substrate is impeded, and wherein the second plurality of leads is singularly interdigitated among the first plurality of leads.
Claim 3
Dependent Claim 29 words
The semiconductor device of claim 1 wherein each lead of the first plurality of leads has a configuration selected from a group consisting of: J-lead, gull-wing, through-hole, and butt-joint.
Claim 4
Dependent Claim 91 words
The semiconductor device of claim 1 further comprising a package body having a bottom surface and a perimeter, the package body encapsulating the semiconductor die and portions of the first and second pluralities of leads, wherein each lead of the first plurality of leads extends from the perimeter of the package body to a point below the bottom of the package body and body and wherein each lead of the second plurality of leads extends from the perimeter of the package body to a point above the bottom of the package.
Claim 5
Dependent Claim 15 words
The semiconductor device of claim 3 wherein the package body is a molded package body.
Claim 6
Dependent Claim 23 words
The semiconductor device of claim 1 wherein the second plurality of conductive leads is evenly distributed between the first plurality of conductive leads.
Claim 7
Dependent Claim 213 words
A semiconductor device comprising: a semiconductor die having an integrated circuit formed thereon, a first plurality of bond pads electrically coupled to operational portions of the integrated circuit, and a second plurality of bond pads electrically coupled to test portions of the integrated circuit; a leadframe having a first plurality and a second plurality of conductive leads, each lead of the first and second pluralities of leads having an inner portion and an outer portion and wherein the second plurality of leads is singularly interdigitated among the first plurality of leads; means for electrically coupling the inner portions of the first plurality of leads to the first plurality of bond pads of the semiconductor die; means for electrically coupling the inner portions of the second plurality of leads to the second plurality of bond pads of the semiconductor die; and a package body which encapsulates the semiconductor die and inner portions of the first and second pluralities of leads, the package body having a bottom surface and a perimeter; wherein the outer portions of the first and second pluralities of leads extend from the perimeter of the package body, and wherein the outer portions of the first plurality of leads are configured differently than the outer portions of the second plurality of leads.
Claim 8
Dependent Claim 213 words
A semiconductor device comprising: a semiconductor die having an integrated circuit formed thereon, a first plurality of bond pads electrically coupled to operational portions of the integrated circuit, and a second plurality of bond pads electrically coupled to test portions of the integrated circuit; a leadframe having a first plurality and a second plurality of conductive leads, each lead of the first and second pluralities of leads having an inner portion and an outer portion and wherein the second plurality of leads is singularly interdigitated among the first plurality of leads; means for electrically coupling the inner portions of the first plurality of leads to the first plurality of bond pads of the semiconductor die; means for electrically coupling the inner portions of the second plurality of leads to the second plurality of bond pads of the semiconductor die; and a package body which encapsulates the semiconductor die and inner portions of the first and second pluralities of leads, the package body having a bottom surface and a perimeter; wherein the outer portions of the first and second pluralities of leads extend from the perimeter of the package body, and wherein the outer portions of the first plurality of leads are configured differently than the outer portions of the second plurality of leads.
Claim 9
Dependent Claim 25 words
The semiconductor device of claim 6 wherein the outer portion of each lead of the second plurality of leads is configured into a test contact.
Claim 10
Dependent Claim 36 words
The semiconductor device of claim 7 wherein the outer portion of each lead of the second plurality of leads is configured to conform to the package body and terminates above the bottom of the package body.
Claim 11
Dependent Claim 30 words
The semiconductor device of claim 7 wherein the outer portion of each lead of the second plurality of leads is straight and terminates above the bottom of the package body.
Claim 12
Dependent Claim 33 words
The semiconductor device of claim 7 wherein the outer portion of each lead of the first plurality of leads has a configuration selected from a group consisting of: J-lead, gull-wing, through-hole, and butt-joint.
Claim 13
Dependent Claim 24 words
The semiconductor device of claim 6 wherein the test portions of the integrated circuit are excluded from the operational portions of the integrated circuit.
Claim 14
Dependent Claim 162 words
A semiconductor device comprising: a semiconductor die having an integrated circuit formed thereon, a plurality of operational bond pads electrically coupled to operational portions of the integrated circuit, and at least one test-only bond pad electrically coupled to a test portion of the integrated circuit; a plurality of operational leads electrically coupled to the plurality of operational bond pads, each lead of the plurality of operational leads being configured for connection to a user substrate, wherein the plurality of operational leads are arranged to have a first pitch; and at least one test-only lead electrically coupled to the at least one test-only bond pad, the at least one test-only lead being configured for testing the device and being configured such that connection to the user substrate is impeded, wherein the at least one test-only lead is arranged between two adjacent operational leads and has a second pitch with respect to the two adjacent operational leads which is less than the first pitch.
Claim 15
Dependent Claim 162 words
A semiconductor device comprising: a semiconductor die having an integrated circuit formed thereon, a plurality of operational bond pads electrically coupled to operational portions of the integrated circuit, and at least one test-only bond pad electrically coupled to a test portion of the integrated circuit; a plurality of operational leads electrically coupled to the plurality of operational bond pads, each lead of the plurality of operational leads being configured for connection to a user substrate, wherein the plurality of operational leads are arranged to have a first pitch; and at least one test-only lead electrically coupled to the at least one test-only bond pad, the at least one test-only lead being configured for testing the device and being configured such that connection to the user substrate is impeded, wherein the at least one test-only lead is arranged between two adjacent operational leads and has a second pitch with respect to the two adjacent operational leads which is less than the first pitch.
Claim 16
Dependent Claim 29 words
The semiconductor device of claim 12 wherein each lead of the plurality of operational leads has a configuration selected from a group consisting of: J-lead, gull-wing, through-hole, and butt-joint.
Claim 17
Dependent Claim 16 words
The semiconductor device of claim 12 wherein the second pitch is approximately one-half the first pitch.
Claim 18
Dependent Claim 93 words
The semiconductor device of claim 12 further comprising a package body having a bottom surface and a perimeter, the package body encapsulating the semiconductor die and portions of the plurality of operational leads and the at least one test-only lead, wherein each lead of the plurality of operational leads extends from the perimeter of the package body to a point below the bottom of the package body and wherein the at least one test-only lead of extends from the perimeter of the package body to a point above the bottom of the package.
Claim 19
Dependent Claim 15 words
The semiconductor device of claim 15 wherein the package body is a molded package body.
Claim 20
Dependent Claim 16 words
The semiconductor device of claim 16 wherein the second pitch is approximately one-half the first pitch.

References Cited (Backward Citations)

US3611061A Cited
JPS57192058A Cited
US4874086A Cited
US5036380A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-10-04 1997-04-05 1997-10-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-10-04 2001-04-05 2001-10-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-10-04 2005-04-05 2005-10-05 $7700.00 Window Closed / Lapsed

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