Method for manufacturing a semiconductor device with corrosion resistant leads

Claim 1

A method of fabrication of a semiconductor device comprising the steps of: providing a board member having first regions disposed for forming a row of supporting members, second regions disposed for forming a pair of ribbon parts extending parallel with each other, and third regions disposed for forming pairs of bridging parts for the respective supporting members and for bridging the corresponding supporting members to said pair of ribbon parts, said first regions each having a mount region for mounting of a semiconductor element having pads; forming on each of said first regions, a respective conductive pattern comprising individual lead elements having first ends positioned near said mount region and having second ends connected in a branch area to a first end of a common plating lead element extending through one of the corresponding third regions; electroplating a protective film over said conductive pattern using said common plating lead element as a plating lead; removing the parts of said individual lead elements and said common lead element in said branch area to isolate the remaining parts of said individual lead elements from each other; mounting a semiconductor element having pads on said mount region in each said first region; connecting said first ends of said leads and pads of said semiconductor element by means of conductors; and sealing said branch area, said semiconductor element and said conductors by means of a sealing material.

Claim 2

A method of fabrication of a semiconductor device comprising the steps of: providing a board member having first regions disposed for forming a row of supporting members, second regions disposed for forming a pair of ribbon parts extending parallel with each other, and third regions disposed for forming pairs of bridging parts for the respective supporting members and for bridging the corresponding supporting members to said pair of ribbon parts, said first regions each having a mount region for mounting of a semiconductor element having pads; forming on each of said first regions, a respective conductive pattern comprising individual lead elements having first ends positioned near said mount region and having second ends connected in a branch area to a first end of a common plating lead element extending through one of the corresponding third regions; electroplating a protective film over said conductive pattern using said common plating lead element as a plating lead; removing the parts of said individual lead elements and said common lead element in said branch area to isolate the remaining parts of said individual lead elements from each other; mounting a semiconductor element having pads on said mount region in each said first region; connecting said first ends of said leads and pads of said semiconductor element by means of conductors; and sealing said branch area, said semiconductor element and said conductors by means of a sealing material.

Claim 9

A method of manufacturing a semiconductor device comprising the steps of: providing a circuit board having a semiconductor element supporting region including a mount region and a bridging region extending from the supporting region; on the circuit board, forming a conductive pattern having a plurality of circuit leads and a common plating lead, with each of the circuit leads having a first end positioned near the mount region and a second end, and with the common plating lead having a common portion located on the bridging region and a plurality of branch portions each of which extends from the common portion to a respective second end of the circuit leads; plating a thin layer on the conductive pattern using the common portion for conduction of electric current for said plating; mechanically removing the plated common portion of the conductive pattern to electrically isolate the circuit leads from each other, and a surface portion of the bridging region and of the supporting region of the circuit board to form a groove; mounting a semiconductor element having a plurality of output pads on the mount region of the circuit board; and molding the semiconductor element and the first ends of the circuit leads with a sealing material.

Claim 10

A method of manufacturing a semiconductor device comprising the steps of: providing a circuit board having a semiconductor element supporting region including a mount region and a bridging region extending from the supporting region; on the circuit board, forming a conductive pattern having a plurality of circuit leads and a common plating lead, with each of the circuit leads having a first end positioned near the mount region and a second end, and with the common plating lead having a common portion located on the bridging region and a plurality of branch portions each of which extends from the common portion to a respective second end of the circuit leads; plating a thin layer on the conductive pattern using the common portion for conduction of electric current for said plating; mechanically removing the plated common portion of the conductive pattern to electrically isolate the circuit leads from each other, and a surface portion of the bridging region and of the supporting region of the circuit board to form a groove; mounting a semiconductor element having a plurality of output pads on the mount region of the circuit board; and molding the semiconductor element and the first ends of the circuit leads with a sealing material.

Claim 16

A method of manufacturing a chip-on-board type semiconductor device comprising the steps of: providing a circuit board having a pair of ribbon regions extending in a first direction, a plurality of semiconductor chip supporting regions arranged in a row and located between the pair of ribbon regions, each of the supporting regions including a chip mounting region, a plurality of bridging regions each of which extends from a supporting region to the ribbon region in a second direction substantially at a right angle with the first direction, and a plurality of press regions each of which is surrounded by the pair of ribbon regions, successive supporting regions, and the bridging regions extending from the successive supporting regions; forming on at least one supporting region of the circuit board a conductive pattern having a plurality of circuit leads each of which has a first end positioned near the mount region and a second end, a common lead extending from the supporting region to the ribbon region across the bridging region, and a plurality of connecting leads positioned on the supporting region, with the connecting leads extending from the common lead to respective second ends of the circuit leads along the outer side of the mounting region; electroplating a protective film on the conductive pattern using the common lead as a plating lead; forming a first groove on the surface of the mounting region of the circuit board and a second groove on the surface of the circuit board to remove the common lead, with the second groove extending from the outer side of the mounting region to the ribbon portion through the bridging region; mounting a semiconductor chip having a plurality of output pads on the base surface of the first groove; and molding the semiconductor chip and the first ends of the circuit leads by a sealing material.

Claim 17

A method of manufacturing a chip-on-board type semiconductor device comprising the steps of: providing a circuit board having a pair of ribbon regions extending in a first direction, a plurality of semiconductor chip supporting regions arranged in a row and located between the pair of ribbon regions, each of the supporting regions including a chip mounting region, a plurality of bridging regions each of which extends from a supporting region to the ribbon region in a second direction substantially at a right angle with the first direction, and a plurality of press regions each of which is surrounded by the pair of ribbon regions, successive supporting regions, and the bridging regions extending from the successive supporting regions; forming on at least one supporting region of the circuit board a conductive pattern having a plurality of circuit leads each of which has a first end positioned near the mount region and a second end, a common lead extending from the supporting region to the ribbon region across the bridging region, and a plurality of connecting leads positioned on the supporting region, with the connecting leads extending from the common lead to respective second ends of the circuit leads along the outer side of the mounting region; electroplating a protective film on the conductive pattern using the common lead as a plating lead; forming a first groove on the surface of the mounting region of the circuit board and a second groove on the surface of the circuit board to remove the common lead, with the second groove extending from the outer side of the mounting region to the ribbon portion through the bridging region; mounting a semiconductor chip having a plurality of output pads on the base surface of the first groove; and molding the semiconductor chip and the first ends of the circuit leads by a sealing material.