Abstract An ID processing dedicated SCSI bus interface logic circuit comprising a self ID decoder for decoding a self ID input; a priority encoder for encoding the highest priority ID on a SBI data bus; an ID Win comparator for comparing the self ID input with an output from said priority encoder to generate an ID win signal; a multiplexer for multiplexing the output from the priority encoder and a target ID input; a target ID decoder for decoding an output from the multiplexer; an NOR gate for NORing outputs from the self ID decoder 11 and from the target ID decoder every bit; a driver for arbitrating an output from the NOR gate to the SBI data bus; an IDOK comparator for comparing the output from the NOR gate with the ID on the SBI data bus to generate a signal IDOK; and a latch for latching the output from the priority encoder in response to an ID latch clock from a host computer to output a target ID selection signal. According to the present invention, the ID processing dedicated SCSI bus interface logic circuit can perform an identification processing and an error detection, with respect to IDs, by comparing the highest priority ID data on the SBI bus with a different ID data in arbitration on a bus between the host computer and target devices.
An ID processing dedicated SCSI bus interface logic circuit comprising: self ID decoding means for decoding a self ID input; priority encoding means for encoding the highest priority ID on an SBI data bus; ID Win comparing means for comparing said self ID input with an output from said priority encoding means to generate an ID win signal; multiplexing means for multiplexing said output from said priority encoding means and a target ID input; target ID decoding means for decoding an output from said multiplexing means; NOR gate means for NORing outputs from said self ID decoding means and from said target ID decoding means every bit; driver means for transferring an output from said NOR gate means to said SBI data bus; IDOK comparing means for comparing said output from said NOR gate means with said ID on said SBI data bus to generate a predetermined signal; and latching means for latching said output from said priority encoding means in response to an ID latch clock from a host computer to output a target ID signal.
Claim 2
Dependent Claim
177 words
An ID processing dedicated SCSI bus interface logic circuit comprising: self ID decoding means for decoding a self ID input; priority encoding means for encoding the highest priority ID on an SBI data bus; ID Win comparing means for comparing said self ID input with an output from said priority encoding means to generate an ID win signal; multiplexing means for multiplexing said output from said priority encoding means and a target ID input; target ID decoding means for decoding an output from said multiplexing means; NOR gate means for NORing outputs from said self ID decoding means and from said target ID decoding means every bit; driver means for transferring an output from said NOR gate means to said SBI data bus; IDOK comparing means for comparing said output from said NOR gate means with said ID on said SBI data bus to generate a predetermined signal; and latching means for latching said output from said priority encoding means in response to an ID latch clock from a host computer to output a target ID signal.