Patent US5247265A successfully refreshed from Google Patents.
US5247265A
Expired / Lapsed
US
⏱️ 0.0 years remaining
PLL frequency synthesizer capable of changing an output frequency at a high speed
Assignee: NEC Corp
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Filing: 1992-08-21
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Granted: 1993-09-21
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Expires: 2012-08-21
Abstract
Abstract In a frequency synthesizer, a first pulse removing circuit (31) is connected between a reference signal generator (21) and a phase-frequency comparator (24). A second pulse removing circuit (32) is connected between a variable frequency divider (23) and the phase-frequency comparator. Responsive to first removing data indicative of a first pulse number, the first pulse removing circuit removes pulses from the reference signal that are equal in number to the first pulse number for a first predetermined cycle to produce a first pulse removed signal. Responsive to second removing data indicative of a second pulse number, the second pulse removing circuit removes pulses from the divided signal that are equal in number to the second pulse number for a second predetermined cycle to produce a second pulse removed signal. Responsive to a current command, a current controlling circuit may control current supplied from/to a charge pump circuit (25). A control circuit may be connected between the phase-frequency comparator and the charge pump circuit. A switch may be inserted between the loop filter and the voltage controlled oscillator. When the switch switches off a PLL, a D/A converter supplies a control voltage to the voltage controlled oscillator and a filter capacitor of the loop filter. The charge pump circuit may comprise a control circuit, a constant current circuit, an integrating circuit, and a sample and hold circuit.
Inventors
- 👤 Hidehiko Norimatsu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 16:13
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/14; H03L7/146; H03L7/085; H03L7/089; H03L7/0891; H03L7/0895; H03L7/0898; H03L7/10; H03L7/107; H03L7/1072; H03L7/16; H03L7/18; H03L7/183; H03L7/187; H03L7/189; H03L7/197; H03L7/1972
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
221 words
A frequency synthesizer comprising: a reference signal generator for generating a reference signal with a reference frequency; a voltage controlled oscillator responsive to a control voltage signal for generating an output signal having an output frequency; a variable frequency divider supplied with said output signal and responsive to a designated dividing number defining said output frequency for frequency dividing said output signal on the basis of said designated dividing number to produce a divided signal; a phase-frequency comparator supplied with said reference signal and said divided signal for detecting a phase-frequency difference between said reference signal and said divided signal to produce a phase-frequency difference signal indicative of said phase-frequency difference, said phase-frequency difference signal comprising a pulse sequence having pulses for a predetermined cycle that are equal in number to a controllable number; modifying means connected to said phase-frequency comparator and responsive to a control enable signal for modifying said phase-frequency difference signal into a modified signal, said control enable signal being present while said controllable oscillating frequency is changed, said modifying means gradually decreasing said controllable number to at last a predetermined final number when said control enable signal is present; and a control voltage supplying circuit supplied with said modified signal for supplying said control voltage signal to said voltage controlled oscillator in response to said modified signal.
Claim 2
Dependent Claim
221 words
A frequency synthesizer comprising: a reference signal generator for generating a reference signal with a reference frequency; a voltage controlled oscillator responsive to a control voltage signal for generating an output signal having an output frequency; a variable frequency divider supplied with said output signal and responsive to a designated dividing number defining said output frequency for frequency dividing said output signal on the basis of said designated dividing number to produce a divided signal; a phase-frequency comparator supplied with said reference signal and said divided signal for detecting a phase-frequency difference between said reference signal and said divided signal to produce a phase-frequency difference signal indicative of said phase-frequency difference, said phase-frequency difference signal comprising a pulse sequence having pulses for a predetermined cycle that are equal in number to a controllable number; modifying means connected to said phase-frequency comparator and responsive to a control enable signal for modifying said phase-frequency difference signal into a modified signal, said control enable signal being present while said controllable oscillating frequency is changed, said modifying means gradually decreasing said controllable number to at last a predetermined final number when said control enable signal is present; and a control voltage supplying circuit supplied with said modified signal for supplying said control voltage signal to said voltage controlled oscillator in response to said modified signal.
Claim 3
Dependent Claim
196 words
A frequency synthesizer comprising: a reference signal generator for generating a reference signal with a reference frequency; a voltage controlled oscillator responsive to a control voltage signal for generating an output signal having an output frequency; a variable frequency divider supplied with said output signal and responsive to a designated dividing number defining said output frequency for frequency dividing said output signal on the basis of said designated dividing number to produce a divided signal; a phase-frequency comparator supplied with said reference signal and said divided signal for detecting a phase-frequency difference between said reference signal and said divided signal to produce a phase-frequency difference signal indicative of said phase-frequency difference, said phase-frequency difference signal comprising a pulse sequence having pulses, each of which has a controllable pulse width; modifying means connected to said phase-frequency comparator and responsive to a control enable signal for modifying said phase-frequency difference signal into a modified signal, said modifying means narrowing said controllable pulse width in response to said control enable signal; and a control voltage supplying circuit supplied with said modified signal for supplying said control voltage signal to said voltage controlled oscillator in response to said modified signal.
Claim 4
Dependent Claim
196 words
A frequency synthesizer comprising: a reference signal generator for generating a reference signal with a reference frequency; a voltage controlled oscillator responsive to a control voltage signal for generating an output signal having an output frequency; a variable frequency divider supplied with said output signal and responsive to a designated dividing number defining said output frequency for frequency dividing said output signal on the basis of said designated dividing number to produce a divided signal; a phase-frequency comparator supplied with said reference signal and said divided signal for detecting a phase-frequency difference between said reference signal and said divided signal to produce a phase-frequency difference signal indicative of said phase-frequency difference, said phase-frequency difference signal comprising a pulse sequence having pulses, each of which has a controllable pulse width; modifying means connected to said phase-frequency comparator and responsive to a control enable signal for modifying said phase-frequency difference signal into a modified signal, said modifying means narrowing said controllable pulse width in response to said control enable signal; and a control voltage supplying circuit supplied with said modified signal for supplying said control voltage signal to said voltage controlled oscillator in response to said modified signal.
References Cited (Backward Citations)
US4568888A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-09-20 | 1997-03-22 | 1997-09-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-09-20 | 2001-03-22 | 2001-09-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-09-20 | 2005-03-22 | 2005-09-21 | $7700.00 | Window Closed / Lapsed |