Method of production of vertical MOS transistor

Claim 1

A method of producing a vertical MOS transistor comprising the steps of: (a) forming a first impurity region on the surface of a semiconductor substrate and a second impurity region under the first impurity region such that the conduction type of the second impurity region is opposite to that of the first impurity region; (b) engraving a trench on the surface of the semiconductor substrate to cut through the first and second impurity regions deeper than at least the bottom of the second impurity region; (c) forming a first insulation film in the trench, disposing conductive material in the trench on the first insulation film, removing a part of the first insulation film to leave a first gate insulation film on the bottom of the trench, the upper end of the first gate insulation film being located lower than the bottom of the second impurity region; and (d) forming a second insulation film which is thinner than the first gate insulation film over the first gate electrode in the trench and over the upper side walls of the trench, and disposing conductive material on the second insulation film, thereby forming a second gate insulation film thinner than the first gate insulation film and a second gate electrode.

Claim 2

A method of producing a vertical MOS transistor comprising the steps of: (a) forming a first impurity region on the surface of a semiconductor substrate and a second impurity region under the first impurity region such that the conduction type of the second impurity region is opposite to that of the first impurity region; (b) engraving a trench on the surface of the semiconductor substrate to cut through the first and second impurity regions deeper than at least the bottom of the second impurity region; (c) forming a first insulation film in the trench, disposing conductive material in the trench on the first insulation film, removing a part of the first insulation film to leave a first gate insulation film on the bottom of the trench, the upper end of the first gate insulation film being located lower than the bottom of the second impurity region; and (d) forming a second insulation film which is thinner than the first gate insulation film over the first gate electrode in the trench and over the upper side walls of the trench, and disposing conductive material on the second insulation film, thereby forming a second gate insulation film thinner than the first gate insulation film and a second gate electrode.

Claim 7

A method of producing a vertical MOS transistor having a source, a drain and a channel, said method comprising: forming a trench in a semiconductor substrate composed of a first semiconductor region of a first conductivity type, a second semiconductor region and a third semiconductor region of said first conductivity type, said first, second and third semiconductor regions being vertically arranged from a surface of said substrate in this order, said trench extending through said first and second semiconductor regions and into said third semiconductor region; forming an insulation film on an inside surface of said trench; forming a conductor on said insulation film in said trench; partially removing said insulation film to form a groove extending through said first and second semiconductor regions and into said third semiconductor region, the lower end of said groove being above the lower end of said conductor; forming a conductive film functioning as a gate electrode of said MOS transistor in said groove on the inside surface through a gate insulation film, said first and third semiconductor regions forming the source or the drain of said MOS transistor, said second semiconductor region forming the channel of said MOS transistor which electrically connects or disconnects the source and the drain of said MOS transistor in accordance with the signal applied to the gate electrode.

Claim 8

A method of producing a vertical MOS transistor having a source, a drain and a channel, said method comprising: forming a trench in a semiconductor substrate composed of a first semiconductor region of a first conductivity type, a second semiconductor region and a third semiconductor region of said first conductivity type, said first, second and third semiconductor regions being vertically arranged from a surface of said substrate in this order, said trench extending through said first and second semiconductor regions and into said third semiconductor region; forming an insulation film on an inside surface of said trench; forming a conductor on said insulation film in said trench; partially removing said insulation film to form a groove extending through said first and second semiconductor regions and into said third semiconductor region, the lower end of said groove being above the lower end of said conductor; forming a conductive film functioning as a gate electrode of said MOS transistor in said groove on the inside surface through a gate insulation film, said first and third semiconductor regions forming the source or the drain of said MOS transistor, said second semiconductor region forming the channel of said MOS transistor which electrically connects or disconnects the source and the drain of said MOS transistor in accordance with the signal applied to the gate electrode.