Patent US5239256A successfully refreshed from Google Patents.
US5239256A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Reference voltage generating circuit for a semiconductor device formed in a semiconductor substrate which generates a reference voltage with a positive temperature coefficient
Assignee: Sharp Corp
•
Filing: 1991-07-24
•
Granted: 1993-08-24
•
Expires: 2011-07-24
Abstract
Abstract First and second P-regions are disposed in N-wells to form first and second PN junctions. The area of the second PN junction is greater than that of the first PN junction. The N-wells and the first and second P-regions are connected between the power supply level for and the ground level, thereby generating a potential difference between the first and second P-regions. This potential difference has a positive temperature coefficient, which is amplified to be supplied as a reference voltage.
Inventors
- 👤 Makoto Yoshida
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 13:23
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/462; G05F1/463; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/22; G05F3/222; G05F3/225; H; H10; H10D; H10D89/00; H10D89/211; H10D89/213; Y; Y10; Y10S; Y10S323/00; Y10S323/907
Claims Analysis
Total Claims: 32
Claim 1
Independent Claim
176 words
A reference voltage generating circuit comprising: a semiconductor substrate; a well having a first conductivity type and being formed in said substrate, said well being connected to a first potential level; at least one first region having a second conductivity type and being formed in said well, said first region and said well forming a first PN junction; at least one second region having the second conductivity type and being formed in said well, said second region and said well forming a second PN junction, said first and second regions being connected to a second potential level, said first and second PN junctions being different in size from each other and the magnitude of a first current which flows across said first PN junction is substantially the same as the magnitude of a second current which flows across said second PN junction; and amplifying means, electrically connected to said first and second regions, for amplifying the voltage difference between said first and second regions, the output of said amplifying means being output as a reference voltage.
Claim 2
Dependent Claim
176 words
A reference voltage generating circuit comprising: a semiconductor substrate; a well having a first conductivity type and being formed in said substrate, said well being connected to a first potential level; at least one first region having a second conductivity type and being formed in said well, said first region and said well forming a first PN junction; at least one second region having the second conductivity type and being formed in said well, said second region and said well forming a second PN junction, said first and second regions being connected to a second potential level, said first and second PN junctions being different in size from each other and the magnitude of a first current which flows across said first PN junction is substantially the same as the magnitude of a second current which flows across said second PN junction; and amplifying means, electrically connected to said first and second regions, for amplifying the voltage difference between said first and second regions, the output of said amplifying means being output as a reference voltage.
Claim 3
Dependent Claim
18 words
A reference voltage generating circuit according to claim 1, wherein said first potential level is the ground level.
Claim 4
Dependent Claim
17 words
A reference voltage generating circuit according to claim 1, wherein said first conductivity type is the N-type.
Claim 5
Dependent Claim
18 words
A reference voltage generating circuit according to claim 1, wherein said second potential level is a positive level.
Claim 6
Dependent Claim
17 words
A reference voltage generating circuit according to claim 1, wherein said second conductivity type is the P-type.
Claim 7
Dependent Claim
18 words
A reference voltage generating circuit according to claim 1, wherein said first and second PN junctions are forward-biased.
Claim 8
Dependent Claim
31 words
A reference voltage generating circuit according to claim 1, wherein the ratio of the area of said second PN junction to that of said first PN junction is a predetermined ratio.
Claim 9
Dependent Claim
210 words
A reference voltage generating circuit comprising: a semiconductor substrate; at least one first well having a first conductivity type and being formed in said substrate, said first well being connected to a first potential level; at least one second well having the first conductivity type and being formed in said substrate, said second well being connected to the first potential level; at least one first region having a second conductivity type and being formed in said first well, said first region and said first well forming a first PN junction; at least one second region having the second conductivity type and being formed in said second well, said second region and said second well forming a second PN junction, said first and second regions being connected to a second potential level, said first and second PN junctions being different in size from each other and the magnitude of a first current which flows across said first PN junction is substantially the same as the magnitude of a second current which flows across said second PN junction; and amplifying means, electrically connected to said first and second regions, for amplifying the voltage difference between said first and second regions, the output of said amplifying means being output as a reference voltage.
Claim 10
Dependent Claim
210 words
A reference voltage generating circuit comprising: a semiconductor substrate; at least one first well having a first conductivity type and being formed in said substrate, said first well being connected to a first potential level; at least one second well having the first conductivity type and being formed in said substrate, said second well being connected to the first potential level; at least one first region having a second conductivity type and being formed in said first well, said first region and said first well forming a first PN junction; at least one second region having the second conductivity type and being formed in said second well, said second region and said second well forming a second PN junction, said first and second regions being connected to a second potential level, said first and second PN junctions being different in size from each other and the magnitude of a first current which flows across said first PN junction is substantially the same as the magnitude of a second current which flows across said second PN junction; and amplifying means, electrically connected to said first and second regions, for amplifying the voltage difference between said first and second regions, the output of said amplifying means being output as a reference voltage.
Claim 11
Dependent Claim
18 words
A reference voltage generating circuit according to claim 8, wherein said first potential level is the ground level.
Claim 12
Dependent Claim
17 words
A reference voltage generating circuit according to claim 8, wherein said first conductivity type is the N-type.
Claim 13
Dependent Claim
18 words
A reference voltage generating circuit according to claim 8, wherein said second potential level is a positive level.
Claim 14
Dependent Claim
17 words
A reference voltage generating circuit according to claim 8, wherein said second conductivity type is the P-type.
Claim 15
Dependent Claim
18 words
A reference voltage generating circuit according to claim 8, wherein said first and second PN junctions are forward-biased.
Claim 16
Dependent Claim
31 words
A reference voltage generating circuit according to claim 8, wherein the ratio of the area of said second PN junction to that of said first PN junction is a predetermined ratio.
Claim 17
Dependent Claim
197 words
A voltage reducing circuit comprising: a semiconductor substrate; a well having a first conductivity type and being formed in said substrate, said well being connected to a first potential level; at least one first region having a second conductivity type and being formed in said well, said first region and said well forming a first PN junction; at least one second region having the second conductivity type and being formed in said well, said second region and said well forming a second PN junction, said first and second regions being connected to a second potential level, said first and second PN junctions being different in size from each other and the magnitude of a first current which flows across said first PN junction is substantially the same as the magnitude of a second current which flows across aid second PN junction; amplifying means, electrically connected to said first and second regions, for amplifying the voltage difference between said first and second regions, the output of said amplifying means being output as a reference voltage; and generating means, connected to the output of said amplifying means, for generating a reduced voltage on the basis of said reference voltage.
Claim 18
Dependent Claim
197 words
A voltage reducing circuit comprising: a semiconductor substrate; a well having a first conductivity type and being formed in said substrate, said well being connected to a first potential level; at least one first region having a second conductivity type and being formed in said well, said first region and said well forming a first PN junction; at least one second region having the second conductivity type and being formed in said well, said second region and said well forming a second PN junction, said first and second regions being connected to a second potential level, said first and second PN junctions being different in size from each other and the magnitude of a first current which flows across said first PN junction is substantially the same as the magnitude of a second current which flows across aid second PN junction; amplifying means, electrically connected to said first and second regions, for amplifying the voltage difference between said first and second regions, the output of said amplifying means being output as a reference voltage; and generating means, connected to the output of said amplifying means, for generating a reduced voltage on the basis of said reference voltage.
Claim 19
Dependent Claim
17 words
A voltage reducing circuit according to claim 15, wherein said first potential level is the ground level.
Claim 20
Dependent Claim
16 words
A voltage reducing circuit according to claim 15, wherein said first conductivity type is the N-type.
Claim 21
Dependent Claim
17 words
A voltage reducing circuit according to claim 15, wherein said second potential level is a positive level.
Claim 22
Dependent Claim
16 words
A voltage reducing circuit according to claim 15, wherein said second conductivity type is the P-type.
Claim 23
Dependent Claim
17 words
A voltage reducing circuit according to claim 15, wherein said first and second PN junctions are forward-biased.
Claim 24
Dependent Claim
30 words
A voltage reducing circuit according to claim 15, wherein the ratio of the area of said second PN junction to that of said first PN junction is a predetermined ratio.
Claim 25
Dependent Claim
231 words
A voltage reducing circuit comprising: a semiconductor substrate; at least one first well having a first conductivity type and being formed in said substrate, said first well being connected to a first potential level; at least one second well having the first conductivity type and being formed in said substrate, said second well being connected to the first potential level; at least one first region having the second conductivity type and being formed in said first well, said first region and said first well forming a first PN junction; at least one second region having a second conductivity type and being formed in said second well, said second region and said second well forming a second PN junction, said first and second regions being connected to a second potential level, said first and second PN junctions being different in size from each other and the magnitude of a first current which flows across said first PN junction is substantially the same as the magnitude of a second current which flows across said second PN junction; amplifying means, electrically connected to said first and second regions, for amplifying the voltage difference between said first and second regions, the output of said amplifying means being output as a reference voltage; and generating means, connected to the output of said amplifying means, for generating a reduced voltage on the basis of said reference voltage.
Claim 26
Dependent Claim
231 words
A voltage reducing circuit comprising: a semiconductor substrate; at least one first well having a first conductivity type and being formed in said substrate, said first well being connected to a first potential level; at least one second well having the first conductivity type and being formed in said substrate, said second well being connected to the first potential level; at least one first region having the second conductivity type and being formed in said first well, said first region and said first well forming a first PN junction; at least one second region having a second conductivity type and being formed in said second well, said second region and said second well forming a second PN junction, said first and second regions being connected to a second potential level, said first and second PN junctions being different in size from each other and the magnitude of a first current which flows across said first PN junction is substantially the same as the magnitude of a second current which flows across said second PN junction; amplifying means, electrically connected to said first and second regions, for amplifying the voltage difference between said first and second regions, the output of said amplifying means being output as a reference voltage; and generating means, connected to the output of said amplifying means, for generating a reduced voltage on the basis of said reference voltage.
Claim 27
Dependent Claim
17 words
A voltage reducing circuit according to claim 22, wherein said first potential level is the ground level.
Claim 28
Dependent Claim
16 words
A voltage reducing circuit according to claim 22, wherein said first conductivity type is the N-type.
Claim 29
Dependent Claim
17 words
A voltage reducing circuit according to claim 22, wherein said second potential level is a positive level.
Claim 30
Dependent Claim
16 words
A voltage reducing circuit according to claim 22, wherein said second conductivity type is the P-type.
Claim 31
Dependent Claim
17 words
A voltage reducing circuit according to claim 22, wherein said first and second PN junctions are forward-biased.
Claim 32
Dependent Claim
30 words
A voltage reducing circuit according to claim 22, wherein the ratio of the area of said second PN junction to that of said first PN junction is a predetermined ratio.
References Cited (Backward Citations)
DE3219811A1
Cited
DD203415A1
Cited
US4672304A
Cited
US4796174A
Cited
GB2198559A
Cited
JPS63258108A
Cited
JPS63275010A
Cited
JPH0245909A
Cited
US5063342A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-08-23 | 1997-02-22 | 1997-08-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-08-23 | 2001-02-22 | 2001-08-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-08-23 | 2005-02-22 | 2005-08-24 | $7700.00 | Window Closed / Lapsed |