Patent US5239198A successfully refreshed from Google Patents.
US5239198A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Overmolded semiconductor device having solder ball and edge lead connective structure
Assignee: NXP USA Inc
•
Filing: 1992-07-02
•
Granted: 1993-08-24
•
Expires: 2012-07-02
Abstract
Abstract A low cost manufacturing method is used to fabricate a small multiple chip semiconductor device (10). In one embodiment, a first pattern of conductive traces (14) is formed on one surface of a substrate (12), and a second pattern of traces (16) is formed on a second surface of the substrate (12). A first semiconductor die (20) is interconnected to the first traces (14), and a package body (24) is formed around the first die and a portion of the traces. A second semiconductor die (26) is interconnected to the second traces (16) on the second surface. A second package body (28) is formed around the second die and a portion of the traces (16). Solder balls (32) are coupled to exposed portions of the second traces (16) around the perimeter of the package body (28) to establish external power and ground connections to each die. Edge leads (36) are externally soldered to the traces (14 & 16) around the periphery of the substrate (12) to establish remaining electrical connections.
Inventors
- 👤 Paul T. Lin
- 👤 Michael B. McShane
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 18:59
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/01; H10W74/019; H10P; H10P72/00; H10P72/70; H10P72/74; H10W70/00; H10W70/60; H10W70/699; H05; H05K; H05K3/00; H05K3/30; H05K3/32; H05K3/34; H05K3/341; H05K3/3431; H10W72/00; H10W72/01; H10W72/0198; H10W72/071; H10W72/072; H10W72/07251; H10W72/075; H10W72/07502; H10W72/07504; H10W72/20; H10W72/50; H10W72/531; H10W72/536; H10W72/851; H10W72/874; H10W72/879; H10W72/884; H10W90/00; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/754; H10W90/756; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49146
Claims Analysis
Total Claims: 41
Claim 1
Independent Claim
119 words
A semiconductor device comprising: a substrate having a pattern of conductive traces on a surface of the substrate, the substrate also having a periphery; at least one electronic component mounted and electrically connected to the pattern of conductive traces; a package body overmolding the electronic component and a first portion of the pattern of conductive traces, leaving a second portion of the pattern of conductive traces exposed; a plurality of solder balls on a portion of the second portion of the pattern of conductive traces; and a plurality of edge leads externally connected to the periphery of the substrate wherein both the plurality of solder balls and the plurality of edge leads provide external electrical connections to the device.
Claim 2
Dependent Claim
119 words
A semiconductor device comprising: a substrate having a pattern of conductive traces on a surface of the substrate, the substrate also having a periphery; at least one electronic component mounted and electrically connected to the pattern of conductive traces; a package body overmolding the electronic component and a first portion of the pattern of conductive traces, leaving a second portion of the pattern of conductive traces exposed; a plurality of solder balls on a portion of the second portion of the pattern of conductive traces; and a plurality of edge leads externally connected to the periphery of the substrate wherein both the plurality of solder balls and the plurality of edge leads provide external electrical connections to the device.
Claim 3
Dependent Claim
169 words
A semiconductor device comprising: a substrate having a first pattern of conductive traces on a first surface of the substrate and a second pattern of conductive traces on a second surface of the substrate, the substrate also having a periphery; a first electronic component mounted and electrically connected to the first pattern of conductive traces on the first surface of the substrate; a second electronic component mounted and electrically connected to the second pattern of conductive traces on the second surface of the substrate; a first package body overmolding the first electronic component and a first portion of the first pattern of conductive traces on the first surface of the substrate, leaving a second portion of the first pattern of conductive traces exposed; a plurality of solder balls on the second surface of the substrate; and a plurality of edge leads externally connected to the periphery of the substrate wherein both the plurality of solder balls and the plurality of edge leads provide external electrical connections to the device.
Claim 4
Dependent Claim
169 words
A semiconductor device comprising: a substrate having a first pattern of conductive traces on a first surface of the substrate and a second pattern of conductive traces on a second surface of the substrate, the substrate also having a periphery; a first electronic component mounted and electrically connected to the first pattern of conductive traces on the first surface of the substrate; a second electronic component mounted and electrically connected to the second pattern of conductive traces on the second surface of the substrate; a first package body overmolding the first electronic component and a first portion of the first pattern of conductive traces on the first surface of the substrate, leaving a second portion of the first pattern of conductive traces exposed; a plurality of solder balls on the second surface of the substrate; and a plurality of edge leads externally connected to the periphery of the substrate wherein both the plurality of solder balls and the plurality of edge leads provide external electrical connections to the device.
Claim 5
Dependent Claim
21 words
The semiconductor device of claim 2 wherein at least one of the first and second electronic component is a semiconductor die.
Claim 6
Dependent Claim
32 words
The semiconductor device of claim 2 wherein at least one of the first and second electronic component is a passive electronic component selected from the group consisting of resistors, capacitors, and diodes.
Claim 7
Dependent Claim
19 words
The semiconductor device of claim 2 wherein the plurality of leads are soldered to the periphery of the substrate.
Claim 8
Dependent Claim
17 words
The semiconductor device of claim 2 wherein the plurality of solder balls are power and ground connections.
Claim 9
Dependent Claim
14 words
The semiconductor device of claim 2 wherein the plurality of leads are signal leads.
Claim 10
Dependent Claim
19 words
The semiconductor device of claim 2 wherein the second electronic component is substantially smaller than the first electronic component.
Claim 11
Dependent Claim
47 words
The semiconductor device of claim 2 further comprising: a second package body overmolding the second electronic component and a first portion of the second pattern of conductive traces on the second surface of the substrate, leaving a second portion of the second pattern of conductive traces exposed.
Claim 12
Dependent Claim
21 words
The semiconductor device of claim 9 wherein the first and second package bodies are formed from an epoxy resin molding compound.
Claim 13
Dependent Claim
32 words
The semiconductor device of claim 9 wherein the plurality of solder balls are located on the second portion of the second pattern of conductive traces on the second surface of the substrate.
Claim 14
Dependent Claim
21 words
The semiconductor device of claim 9 wherein the plurality of solder balls has a peripheral configuration around the second package body.
Claim 15
Dependent Claim
220 words
A semiconductor device comprising: a substrate having a first pattern of conductive traces on a first surface of the substrate and a second pattern of conductive traces on a second surface of the substrate, the substrate also having a periphery; a first semiconductor die mounted and electrically connected to the first pattern of conductive traces on the first surface of the substrate; a second semiconductor die mounted and electrically connected to the second pattern of conductive traces on the second surface of the substrate; a first package body overmolding the first semiconductor die and a first portion of the first pattern of conductive traces on the first surface of the substrate, leaving a second portion of the first pattern of conductive traces exposed; a second package body overmolding the second semiconductor die and a first portion of the second pattern of conductive traces on the second surface of the substrate, leaving a second portion of the second pattern of conductive traces exposed; a plurality of solder balls on the exposed second portion of the second pattern of conductive traces on the second surface of the substrate; and a plurality of edge leads externally connected to the periphery of the substrate wherein both the plurality of solder balls and the plurality of edge leads provide external electrical connections to the device.
Claim 16
Dependent Claim
220 words
A semiconductor device comprising: a substrate having a first pattern of conductive traces on a first surface of the substrate and a second pattern of conductive traces on a second surface of the substrate, the substrate also having a periphery; a first semiconductor die mounted and electrically connected to the first pattern of conductive traces on the first surface of the substrate; a second semiconductor die mounted and electrically connected to the second pattern of conductive traces on the second surface of the substrate; a first package body overmolding the first semiconductor die and a first portion of the first pattern of conductive traces on the first surface of the substrate, leaving a second portion of the first pattern of conductive traces exposed; a second package body overmolding the second semiconductor die and a first portion of the second pattern of conductive traces on the second surface of the substrate, leaving a second portion of the second pattern of conductive traces exposed; a plurality of solder balls on the exposed second portion of the second pattern of conductive traces on the second surface of the substrate; and a plurality of edge leads externally connected to the periphery of the substrate wherein both the plurality of solder balls and the plurality of edge leads provide external electrical connections to the device.
Claim 17
Dependent Claim
19 words
The semiconductor device of claim 13 wherein the plurality of leads are soldered to the periphery of the substrate.
Claim 18
Dependent Claim
17 words
The semiconductor device of claim 13 wherein the plurality of solder balls are power and ground connections.
Claim 19
Dependent Claim
14 words
The semiconductor device of claim 13 wherein the plurality of leads are signal leads.
Claim 20
Dependent Claim
19 words
The semiconductor device of claim 13 wherein the second semiconductor die is substantially smaller than the first semiconductor die.
Claim 21
Dependent Claim
21 words
The semiconductor device of claim 13 wherein the plurality of solder balls has a peripheral configuration around the second package body.
Claim 22
Dependent Claim
21 words
The semiconductor device of claim 13 wherein the first and second package bodies are formed from an epoxy resin molding compound.
Claim 23
Dependent Claim
168 words
A semiconductor device comprising: a substrate having a first pattern of conductive traces on a first surface of the substrate and a second pattern of conductive traces on a second surface of the substrate, the substrate also having a periphery; a semiconductor die mounted and electrically connected to the first pattern of conductive traces on the first surface of the substrate; a passive electronic component mounted and electrically connected to the second pattern of conductive traces on the second surface of the substrate; a first package body overmolding the first semiconductor die and a first portion of the first pattern of conductive traces on the first surface of the substrate, leaving a second portion of the first pattern of conductive traces exposed; a plurality of solder balls on the second surface of the substrate; and a plurality of edge leads externally connected to the periphery of the substrate wherein both the plurality of solder balls and the plurality of edge leads provide external electrical connections to the device.
Claim 24
Dependent Claim
168 words
A semiconductor device comprising: a substrate having a first pattern of conductive traces on a first surface of the substrate and a second pattern of conductive traces on a second surface of the substrate, the substrate also having a periphery; a semiconductor die mounted and electrically connected to the first pattern of conductive traces on the first surface of the substrate; a passive electronic component mounted and electrically connected to the second pattern of conductive traces on the second surface of the substrate; a first package body overmolding the first semiconductor die and a first portion of the first pattern of conductive traces on the first surface of the substrate, leaving a second portion of the first pattern of conductive traces exposed; a plurality of solder balls on the second surface of the substrate; and a plurality of edge leads externally connected to the periphery of the substrate wherein both the plurality of solder balls and the plurality of edge leads provide external electrical connections to the device.
Claim 25
Dependent Claim
19 words
The semiconductor device of claim 20 wherein the plurality of leads are soldered to the periphery of the substrate.
Claim 26
Dependent Claim
17 words
The semiconductor device of claim 20 wherein the plurality of solder balls are power and ground connections.
Claim 27
Dependent Claim
14 words
The semiconductor device of claim 20 wherein the plurality of leads are signal leads.
Claim 28
Dependent Claim
22 words
The semiconductor device of claim 20 wherein the passive electronic component is selected from the group consisting of resistors, capacitors, and diodes.
Claim 29
Dependent Claim
119 words
A semiconductor device comprising: a PCB substrate having a pattern of conductive traces including a plurality of solder lands along an edge of the PCB substrate, wherein the plurality of solder lands are used as edge connectors; a first semiconductor die directly mounted on a first side of the PCB substrate, wherein the first semiconductor die is electrically coupled to the pattern of conductive traces; a first package body protecting the first semiconductor die and a first portion of the pattern of conductive traces on the PCB substrate, leaving the plurality of solder lands along the edge of the PCB substrate exposed; and a plurality of solder balls attached to the plurality of solder lands on the PCB substrate.
Claim 30
Dependent Claim
119 words
A semiconductor device comprising: a PCB substrate having a pattern of conductive traces including a plurality of solder lands along an edge of the PCB substrate, wherein the plurality of solder lands are used as edge connectors; a first semiconductor die directly mounted on a first side of the PCB substrate, wherein the first semiconductor die is electrically coupled to the pattern of conductive traces; a first package body protecting the first semiconductor die and a first portion of the pattern of conductive traces on the PCB substrate, leaving the plurality of solder lands along the edge of the PCB substrate exposed; and a plurality of solder balls attached to the plurality of solder lands on the PCB substrate.
Claim 31
Dependent Claim
12 words
The semiconductor device of claim 25 wherein the PCB substrate is multilayered.
Claim 32
Dependent Claim
37 words
The semiconductor device of claim 25 wherein the pattern of conductive traces is on both a first and second surface of the PCB substrate, the PCB substrate further having vias to interconnect the pattern of conductive traces.
Claim 33
Dependent Claim
39 words
The semiconductor device of claim 25 wherein the plurality of solder balls attached to the plurality of solder lands is located on both the first and second surface of the PCB substrate along the edge of the PCB substrate.
Claim 34
Dependent Claim
49 words
The semiconductor device of claim 25 wherein the PCB substrate has at least one alignment pin extending from an edge of the PCB substrate where the plurality of solder lands lies along the edge, the alignment pin being a method for inserting the semiconductor device into a PC board.
Claim 35
Dependent Claim
28 words
The semiconductor device of claim 25 wherein the first semiconductor die is electrically coupled to the pattern of conductive traces by way of a plurality of wire bonds.
Claim 36
Dependent Claim
24 words
The semiconductor device of claim 25 wherein the first semiconductor die is electrically coupled to the pattern of conductive traces through flip chip bonding.
Claim 37
Dependent Claim
47 words
The semiconductor device of claim 25 further comprising: a second semiconductor die directly mounted on a second opposing side of the PCB substrate, wherein the second semiconductor die is electrically coupled to the pattern of conductive traces; and a second package body protecting the second semiconductor die.
Claim 38
Dependent Claim
28 words
The semiconductor device of claim 32 wherein the second semiconductor die is electrically coupled to the pattern of conductive traces by way of a plurality of wire bonds.
Claim 39
Dependent Claim
24 words
The semiconductor device of claim 32 wherein the second semiconductor die is electrically coupled to the pattern of conductive traces through flip chip bonding.
Claim 40
Dependent Claim
113 words
A semiconductor device comprising: a PCB substrate having a pattern of conductive traces including a plurality of plated half-vias along an edge of the PCB substrate, wherein the plurality of half-vias are used as edge connectors; a semiconductor die directly mounted on a first side of the PCB substrate, wherein the semiconductor die is electrically coupled to the pattern of conductive traces; a first package body protecting the semiconductor die and a first portion of the pattern of conductive traces on the PCB substrate, leaving the plurality of half-vias along the edge of the PCB substrate exposed; and a plurality of solder balls attached to the plurality of half-vias on the PCB substrate.
Claim 41
Dependent Claim
113 words
A semiconductor device comprising: a PCB substrate having a pattern of conductive traces including a plurality of plated half-vias along an edge of the PCB substrate, wherein the plurality of half-vias are used as edge connectors; a semiconductor die directly mounted on a first side of the PCB substrate, wherein the semiconductor die is electrically coupled to the pattern of conductive traces; a first package body protecting the semiconductor die and a first portion of the pattern of conductive traces on the PCB substrate, leaving the plurality of half-vias along the edge of the PCB substrate exposed; and a plurality of solder balls attached to the plurality of half-vias on the PCB substrate.
References Cited (Backward Citations)
US4264917A
Cited
US4647126A
Cited
US4807021A
Cited
US4922378A
Cited
US4975763A
Cited
US5095359A
Cited
US4967262A
Cited
US5018005A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-08-23 | 1997-02-22 | 1997-08-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-08-23 | 2001-02-22 | 2001-08-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-08-23 | 2005-02-22 | 2005-08-24 | $7700.00 | Window Closed / Lapsed |