Processing system and method including lock buffer for controlling exclusive critical problem accesses by each processor

Claim 1

A processing system of the type including a plurality of processor subsystems, a memory shared by said plurality of processor subsystems, and a common bus coupling said plurality of processor subsystems together and to said shared memory, said processing system including a program store means for storing program instructions, said program instructions including at least one critical program section, said processing system being arranged to permit only one selected processor subsystem of said plurality of processor subsystems to execute a selected critical program section of said at least one critical program section at a time wherein said execution of said selected critical program section requires the use of processing system resources shared with at least one processor subsystem of said plurality of processor subsystems other than said selected processor subsystem, said processing system comprising: a processor associated with each of said plurality of processor subsystems for receiving selected program instructions from said program store means and executing said selected program instructions; a memory portion within said shared memory for storing an interlock variable value, said interlock variable value being a busy value indicating that one processor subsystem of said plurality of processor subsystems is currently executing a critical program section of said at least one critical program section or an available value indicating that none of said processor subsystems of said plurality of processor subsystems is currently executing a critical program section of said at least one critical program section; a respective lock buffer means associated with said associated processor of each respective processor subsystem of said plurality of processor subsystems, each said respective lock buffer means being dedicated for storing said interlock variable value, each said respective lock buffer means being coupled to said common bus and to said associated processor; and a respective control means associated with each said respective processor subsystem and being responsive to a command instruction from said associated processor indicating the start of a respective critical program section of said at least one critical program section for detecting said interlock variable value stored in said respective lock buffer means; said respective control means responding to detection of said busy value of said stored interlock variable value by causing the conveyance to said associated processor of said detected busy value to preclude said associated processor from entering said respective critical program section; said respective control means responding to detection of said available value of said stored interlock variable value by causing the conveyance of said detected available value to said associated processor to permit said associated processor to execute said respective critical program section, and by causing the conveyance of said busy value of said interlock variable value to said respective lock buffer and causing the conveyance of said busy value of said interlock variable value over said common bus to said memory portion of said shared memory and to said lock buffer means associated with other said processor subsystems of said plurality of processor subsystems than said respective processor subsystem.

Claim 12

A method for use in a processing system of the type including a plurality of processors coupled to each other and to a shared memory over a common bus, said processing system further including a program store means for storing program instructions, each of said plurality of processors receiving selected program instructions from said program store and executing said selected program instructions, said program instructions including at least one critical program section requiring exclusive execution thereof, the method permitting exclusive execution of respective critical program sections of said at least one critical program section by respective processors of said plurality of processors and comprising the steps of: providing each said respective processor with a respective lock buffer means dedicated for storing an interlock variable value; storing within each said respective lock buffer means and within said shared memory said interlock variable value, said interlock variable value being either an available value indicating that none of said plurality of processors is currently executing a critical program section of said at least one critical program section or a busy value indicating that one of said plurality of processors is currently executing a critical program section of said at least one critical program section; detecting said interlock variable value in one of said respective lock buffer means responsive to a command instruction from its associated respective processor indicating the start of said respective critical program section; and conveying said available value of said interlock variable value to said associated respective processor and conveying, over said common bus, said busy value of said interlock variable value to said shared memory and to other said lock buffer means associated with other said processors of said plurality of processors than said associated respective processor, whereby said interlock variable value stored in said shared memory and stored in said other lock buffer means is updated to said busy value after detecting said available value of said interlock variable value in said respective lock buffer means.

Claim 13

A method for use in a processing system of the type including a plurality of processors coupled to each other and to a shared memory over a common bus, said processing system further including a program store means for storing program instructions, each of said plurality of processors receiving selected program instructions from said program store and executing said selected program instructions, said program instructions including at least one critical program section requiring exclusive execution thereof, the method permitting exclusive execution of respective critical program sections of said at least one critical program section by respective processors of said plurality of processors and comprising the steps of: providing each said respective processor with a respective lock buffer means dedicated for storing an interlock variable value; storing within each said respective lock buffer means and within said shared memory said interlock variable value, said interlock variable value being either an available value indicating that none of said plurality of processors is currently executing a critical program section of said at least one critical program section or a busy value indicating that one of said plurality of processors is currently executing a critical program section of said at least one critical program section; detecting said interlock variable value in one of said respective lock buffer means responsive to a command instruction from its associated respective processor indicating the start of said respective critical program section; and conveying said available value of said interlock variable value to said associated respective processor and conveying, over said common bus, said busy value of said interlock variable value to said shared memory and to other said lock buffer means associated with other said processors of said plurality of processors than said associated respective processor, whereby said interlock variable value stored in said shared memory and stored in said other lock buffer means is updated to said busy value after detecting said available value of said interlock variable value in said respective lock buffer means.