Patent US5235292A successfully refreshed from Google Patents.
US5235292A
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Signal generator having backup oscillator switching circuit
Assignee: Fujitsu Ltd
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Filing: 1992-06-03
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Granted: 1993-08-10
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Expires: 2012-06-03
Abstract
Abstract A signal generator having a switching function includes a first oscillation circuit, a second oscillation circuit, a frequency-division circuit and a combination circuit. The first oscillation circuit outputs a first frequency signal having a first frequency and a reset signal synchronized with the first frequency signal. The second oscillation circuit outputs a second frequency signal having a second frequency which is N times higher than the first frequency. The frequency-division circuit frequency-divides the second frequency signal by N, resets a value for frequency-division based on the reset signal and generates a divided second frequency signal. The combination circuit combines the first frequency signal and the divided second frequency signal and outputs a combined signal.
Inventors
- 👤 Yoichi Endo
- 👤 Eiji Itaya
- 👤 Yoshiaki Kumagai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 12:19
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/60; G06F7/68; H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/0807
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
128 words
A signal generator having a switching function comprising: first oscillation means for outputting a first frequency signal having a first frequency and a reset signal synchronized with the first frequency signal; second oscillation means for outputting a second frequency signal having a second frequency which is N times higher than the first frequency, where N is a real number; frequency-division means, coupled to said first and second oscillation means, for frequency-dividing the second frequency signal by N, for resetting a value for frequency-division based on the reset signal and for generating a divided second frequency signal; and combination means, coupled to said first oscillation means and said frequency division means, for combining the first frequency signal and the divided second frequency signal and for outputting a combined signal.
Claim 2
Dependent Claim
128 words
A signal generator having a switching function comprising: first oscillation means for outputting a first frequency signal having a first frequency and a reset signal synchronized with the first frequency signal; second oscillation means for outputting a second frequency signal having a second frequency which is N times higher than the first frequency, where N is a real number; frequency-division means, coupled to said first and second oscillation means, for frequency-dividing the second frequency signal by N, for resetting a value for frequency-division based on the reset signal and for generating a divided second frequency signal; and combination means, coupled to said first oscillation means and said frequency division means, for combining the first frequency signal and the divided second frequency signal and for outputting a combined signal.
Claim 3
Dependent Claim
71 words
A signal generator according to claim 1, wherein said first oscillation means includes: first frequency signal generation means for generating an advanced first frequency signal and a delayed first frequency signal, and for outputting the delayed first frequency signal to said combination means as the first frequency signal, and reset signal generation means for generating the reset signal based on the advanced first frequency signal and the delayed first frequency signal.
Claim 4
Dependent Claim
64 words
A signal generator according to claim 2, wherein said first frequency signal generation means includes: an oscillator to output an oscillation signal; a frequency-divider coupled to the oscillator, to frequency-divide the oscillation signal and to output the advanced first frequency signal; and a delay circuit coupled to the frequency-divider, to delay the advanced first frequency signal and to output the delayed first frequency signal.
Claim 5
Dependent Claim
21 words
A signal generator according to said claim 3, wherein said delay circuit is a plurality of inverter gates connected in series.
Claim 6
Dependent Claim
20 words
A signal generator according to said claim 3, wherein said delay circuit is a plurality of flip-flops connected in series.
Claim 7
Dependent Claim
54 words
A signal generator according to said claim 3, wherein said delay circuit includes a plurality of unit delay circuits connected in series and wherein each unit delay circuit includes a serial resistor, a parallel capacitor connected to the serial resistor and a Schmitt trigger gate connected to the serial resistor and the parallel capacitor.
Claim 8
Dependent Claim
45 words
A signal generator according to claim 3, said frequency-divider includes: a counter coupled to the oscillator to count pulses in the oscillation signal; and a decoder coupled to the counter, to decode a value in the counter and to output the advanced first frequency signal.
Claim 9
Dependent Claim
88 words
A signal generator according to claim 2, wherein said first frequency signal generation means includes: an oscillator to output an oscillation signal; a counter coupled to the oscillator, to count pulses in the oscillation signal to produce first and second values; a first decoder coupled to the counter, to decode the first value in the counter and to output the advanced first frequency signal; and a second decoder coupled to the counter, to decode the second value in the counter and to output the delayed first frequency signal.
Claim 10
Dependent Claim
43 words
A signal generator according to claim 2, wherein said reset signal generation means includes an OR gate coupled to said first frequency signal generation means, which OR's the advanced first frequency signal and the delayed first frequency signal, to generate the reset signal.
Claim 11
Dependent Claim
83 words
A signal generator according to claim 2, wherein said reset signal generation means includes first edge detecting means for generating a first pulse signal based on a front edge of the advanced frequency signal; second edge detecting means for generating a second pulse signal based on a front edge of the delayed frequency signal; and an OR gate coupled to said first and second edge detecting means, which OR's the first pulse signal and the second pulse signal, to generate the reset signal.
Claim 12
Dependent Claim
61 words
A signal generator according to claim 2, wherein said reset signal generation means includes an OR gate coupled to said first frequency signal generation means, which OR's the advanced first frequency signal and the delayed first frequency signal to generate an OR signal; and edge detecting means for generating the reset signal based on a front edge of the OR signal.
Claim 13
Dependent Claim
50 words
A signal generator according to claim 2, wherein said frequency-division means includes: a counter coupled to said second oscillation means, to count pulses in the second frequency signal; and a decoder coupled to the counter, to decode a value in the counter and to output the divided second frequency signal.
Claim 14
Dependent Claim
15 words
A signal generator according to claim 2, wherein said combination means is an exclusive OR-gate.
Claim 15
Dependent Claim
145 words
A signal generator according to claim 2, wherein said first frequency signal generation means includes: an oscillator to output an oscillation signal; a first frequency-divider coupled to the oscillator, to frequency-divide the oscillation signal and to output a first frequency-divided signal; first edge detecting means for generating the advanced first frequency signal based on a front edge of each pulse of the first frequency-divided signal; and a delay circuit coupled to said first edge detecting means, to delay the advanced first frequency signal and to output the delayed first frequency signal; and wherein said frequency division means includes: a second frequency-divider coupled to said second oscillation means, to frequency-divide the second frequency signal and to output a second frequency-divided signal; and second edge detecting means for generating the divided second frequency signal based on a front edge of each pulse of the second frequency-divided signal.
Claim 16
Dependent Claim
15 words
A signal generator according to claim 14, wherein said combination means is an OR gate.
Claim 17
Dependent Claim
27 words
A signal generator according to claim 1, further comprising: filter means, coupled to said combination means, for absorbing a fluctuation of a frequency of the combined signal.
Claim 18
Dependent Claim
99 words
A signal generator according to claim 16, wherein said filter means is a phase-locked loop including: a phase comparator coupled to said combination means, to make a comparison between phases of the combined signal and an output signal of the phase-locked loop and to output a result signal of the comparison; a filter coupled to the phase comparator, to decrease a high frequency component of the result signal and to output a filtered signal; and a voltage-controlled oscillator coupled to the filter, to generate the output signal of the phase-locked loop having a frequency controlled by the filtered signal.
Claim 19
Dependent Claim
129 words
A signal generator having a switching function comprising: first oscillation means for outputting a first frequency signal having a first frequency and a reset signal synchronized with the first frequency signal; a second oscillator to output a second frequency signal having a second frequency which is N times higher than the first frequency, where N is a real number; a frequency-divider, coupled to said first oscillation means and said second oscillator, to frequency-divide the second frequency signal by N, to reset a value for frequency-division based on the reset signal and to generate a divided second frequency signal; and a combining circuit, coupled to said first oscillation means and said frequency-divider, to combine the first frequency signal and the divided second frequency signal and to output a combined signal.
Claim 20
Dependent Claim
129 words
A signal generator having a switching function comprising: first oscillation means for outputting a first frequency signal having a first frequency and a reset signal synchronized with the first frequency signal; a second oscillator to output a second frequency signal having a second frequency which is N times higher than the first frequency, where N is a real number; a frequency-divider, coupled to said first oscillation means and said second oscillator, to frequency-divide the second frequency signal by N, to reset a value for frequency-division based on the reset signal and to generate a divided second frequency signal; and a combining circuit, coupled to said first oscillation means and said frequency-divider, to combine the first frequency signal and the divided second frequency signal and to output a combined signal.
Claim 21
Independent Claim
95 words
A method for generating a signal, comprising the steps of: (a) generating a first frequency signal and a reset signal synchronized with the first frequency signal; (b) generating a second frequency signal having a second frequency which is N times higher than the first frequency, where N is a real number; (c) frequency-dividing the second frequency signal by N and resetting a value for frequency-division based on the reset signal, to generate a divided second frequency signal; and (d) combining the first frequency signal and the divided second frequency signal to output a combined signal.
Claim 22
Independent Claim
95 words
A method for generating a signal, comprising the steps of: (a) generating a first frequency signal and a reset signal synchronized with the first frequency signal; (b) generating a second frequency signal having a second frequency which is N times higher than the first frequency, where N is a real number; (c) frequency-dividing the second frequency signal by N and resetting a value for frequency-division based on the reset signal, to generate a divided second frequency signal; and (d) combining the first frequency signal and the divided second frequency signal to output a combined signal.
References Cited (Backward Citations)
US3803568A
Cited
US4949052A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1996-08-09 | 1997-02-08 | 1997-08-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-08-09 | 2001-02-08 | 2001-08-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-08-09 | 2005-02-08 | 2005-08-10 | $7700.00 | Window Closed / Lapsed |