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US5235218A
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Switching constant current source circuit
Assignee: Toshiba Corp
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Filing: 1991-11-14
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Granted: 1993-08-10
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Expires: 2011-11-14
Abstract
Abstract This invention discloses a switching constant current source circuit including a first current path for supplying a constant current, a first MOS transistor, one end of a current path of which is connected to the first current path, the other end of the current path of which is connected to a second current path, and a gate of which is applied with a digital signal corresponding to a logical amplitude, a second MOS transistor, one end of a current path of which is connected to the first current path, the other end of the current path of which is connected to a third current path, and which performs a switching operation complementary with the first MOS transistor, and level conversion means for fetching a change in voltage in the first current path caused by a change in current flowing through the first current path according to an operation of the first MOS transistor in response to the digital signal, and alternately applying a first level for disabling the second MOS transistor, which operates complementarily with the first MOS transistor, and a second level for enabling the second MOS transistor to output a predetermined current.
Inventors
- 👤 Kenji Matsuo
- 👤 Shinji Fujii
- 👤 Yasukazu Noine
- 👤 Kazuhiko Kasai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 14:18
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/04; H03K17/041; H03K17/04106; H03K17/51; H03K17/56; H03K17/687; H03K17/693
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
191 words
A switching constant current source circuit comprising: a first current path for supplying a constant current; a first MOS transistor, one end of a current path of which is connected to said first current path, the other end of said current path of which is connected to a second current path, and a gate of which is applied with a digital signal corresponding to a logical amplitude; a second MOS transistor, one end of a current path of which is connected to said first current path, the other end of said current path of which is connected to a third current path, and which performs a switching operation complementary with said first MOS transistor; and level conversion means responsive to a change in voltage in said first current path caused by a change in current flowing through said first current path according to an operation of said first MOS transistor in response to the digital signal, and alternately applying a first level for disabling said second MOS transistor, which operates complementarily with said first MOS transistor, and a second level for enabling said second MOS transistor to output a predetermined current.
Claim 2
Dependent Claim
191 words
A switching constant current source circuit comprising: a first current path for supplying a constant current; a first MOS transistor, one end of a current path of which is connected to said first current path, the other end of said current path of which is connected to a second current path, and a gate of which is applied with a digital signal corresponding to a logical amplitude; a second MOS transistor, one end of a current path of which is connected to said first current path, the other end of said current path of which is connected to a third current path, and which performs a switching operation complementary with said first MOS transistor; and level conversion means responsive to a change in voltage in said first current path caused by a change in current flowing through said first current path according to an operation of said first MOS transistor in response to the digital signal, and alternately applying a first level for disabling said second MOS transistor, which operates complementarily with said first MOS transistor, and a second level for enabling said second MOS transistor to output a predetermined current.
Claim 3
Dependent Claim
94 words
A circuit according to claim 1, wherein said level conversion means comprises a third MOS transistor serving as a reference source, a fourth MO transistor constituting a current mirror circuit together with said third MOS transistor, and an amplifier, a non-inverting input terminal thereof is connected to a common gate of said third and fourth transistors, an inverting input terminal thereof is connected to a node of the current paths of said first, second, and fourth MOS transistors, and an output terminal of which is connected to a gate of said second MOS transistor.
Claim 4
Dependent Claim
42 words
A circuit according to claim 1, wherein said level conversion means comprises a third MOS transistor, a gate of which is connected to said first current path, and a fourth MOS transistor which is connected in series with said third MOS transistor.
Claim 5
Dependent Claim
48 words
A circuit according to claim 1, wherein said level conversion means comprises an amplifier, a non-inverting input terminal of which is connected to said first current path, and an inverting input terminal and an output terminal of which are connected to a gate of said second MOS transistor.
Claim 6
Dependent Claim
52 words
A circuit according to claim 1, wherein said level conversion means comprises an amplifier, a non-inverting input terminal of which is connected to a reference potential, an inverting input terminal of which is connected to said first current path, and an output terminal of which is connected to said second MOS transistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-08-09 | 1997-02-08 | 1997-08-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-08-09 | 2001-02-08 | 2001-08-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-08-09 | 2005-02-08 | 2005-08-10 | $7700.00 | Window Closed / Lapsed |