Patent US2789867A successfully refreshed from Google Patents.
Patent US3817387A successfully refreshed from Google Patents.
Patent US5661817A successfully refreshed from Google Patents.
Patent US5231046A successfully refreshed from Google Patents.
US5231046A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for fabricating an interconnection pattern on a BPSG-filled trench isolation structure
Assignee: Renesas Electronics Corp
•
Filing: 1992-05-07
•
Granted: 1993-07-27
•
Expires: 2012-05-07
Abstract
Abstract A semiconductor device is provided with an isolation region for isolating the semiconductor device from an adjacent semiconductor device provided commonly on a semiconductor substrate. The isolation region includes a groove extending to a predetermined depth of the substrate, a non-doped silicon oxide layer provided on a whole inner surface of the groove, and a BPSG (boro-phosho-silicate glass) layer filled in a remaining portion of the groove covered with the non-doped silicon oxide layer on the inner surface. An interconnection layer is provided on the isolating region selectively.
Inventors
- 👤 Kazuhiro Tasaka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 09:32
CPC Classifications
H; H10; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10P; H10P50/00; H10P50/20; H10P50/28; H10P50/282; H10P50/283; H10W10/10; H10W10/17; H10W20/00; H10W20/01; H10W20/031; H10W20/064; H10W20/066; Y; Y10; Y10S; Y10S148/00; Y10S148/05
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
131 words
A method for fabricating a semiconductor device, comprising the steps of: forming a gate insulation film, a polycrystal silicon film and a first insulation film successively over a semiconductor substrate; etching said gate insulation film, said polycrystal silicon film and said first insulation film at a region under which a device separation region is to be provided; etching said semiconductor substrate by use of said first insulation film as a mask, thereby providing a groove for said device separation region; providing second and third insulating films to be filled into said groove; etching said first to third insulation films by use of said polycrystal silicon film as a stopper to have said second and third insulation films remain in said groove; and providing a conductive interconnection on said polycrystal silicon film.
Claim 2
Independent Claim
131 words
A method for fabricating a semiconductor device, comprising the steps of: forming a gate insulation film, a polycrystal silicon film and a first insulation film successively over a semiconductor substrate; etching said gate insulation film, said polycrystal silicon film and said first insulation film at a region under which a device separation region is to be provided; etching said semiconductor substrate by use of said first insulation film as a mask, thereby providing a groove for said device separation region; providing second and third insulating films to be filled into said groove; etching said first to third insulation films by use of said polycrystal silicon film as a stopper to have said second and third insulation films remain in said groove; and providing a conductive interconnection on said polycrystal silicon film.
Claim 3
Dependent Claim
40 words
A method for fabricating a semiconductor device according to claim 1, wherein: the step of etching said second and third insulation films includes etching said third insulation film by an etching rate faster than that of said second insulation film.
Claim 4
Dependent Claim
39 words
A method for fabricating a semiconductor device according to claim 1, wherein: the step of providing said second insulation film includes providing non-doped silicon oxide; and the step of providing said third insulation film includes providing BPSG (boro-phospho-silicate glass).
Claim 5
Dependent Claim
38 words
A method for fabricating a semiconductor device according to claim 1, wherein: the step of providing said second insulation film includes providing silicon nitride; and the step of providing said third insulation film includes providing BPSG (boro-phospho-silicate glass).
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-07-26 | 1997-01-25 | 1997-07-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-07-26 | 2001-01-25 | 2001-07-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-07-26 | 2005-01-25 | 2005-07-27 | $7700.00 | Window Closed / Lapsed |