Cmos band gap reference circuit

Claim 1

A MOS band gap reference circuit configuration formed in a monolithic substrate, comprising first and second parasitic bipolar transistors having base-to-emitter voltages, an emitter resistor connected to said first parasitic bipolar transistor, and an operational amplifier connected to respective emitters of said parasitic bipolar transistors for processing a difference generated between the base-to-emitter voltages of said first and second bipolar transistors to generate a largely temperature-independent reference voltage, a substrate zone forming a collector, an n-conductive well in complementary MOS technology forming a base, and a p-conductive diffusing zone in the n-conductive well forming an emitter, of one of said parasitic bipolar transistors, and including at least one further parasitic bipolar transistor with which each of said first and second bipolar transistors are cascaded, said at least one further parasitic bipolar transistor having an emitter to which the base terminals of at least one of said first and second bipolar transistors are connected, and said at least one further parasitic bipolar transistor having a collector being jointly formed with the collectors of said first and second bipolar transistors by the substrate zone.