Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
168 words
A television receiver for extended definition television comprising: a luminance video signal processing circuit for controllably processing a separated luminance component of an extended definition television signal and comprising field memory means for delaying the separated luminance components, a motion detection circuit connected to outputs of said field memory means for detecting frame-to-frame motion in the separated luminance component, a scanning line interpolation circuit connected to said field memory means and having controllable interpolation coefficients controlled in response to outputs from said motion detecting circuit, and a time compression circuit connected to outputs of said scanning line interpolation circuit; a chrominance video signal processing circuit for controllably processing a separated chrominance component of the extended definition television signal; and a normal video signal detection circuit for detecting a number of scanning lines in a field of the extended definition television signal and controlling the processing of said luminance video signal processing circuit and said chrominance video signal processing circuit in response to a detected number of scanning lines.
Claim 2
Dependent Claim
168 words
A television receiver for extended definition television comprising: a luminance video signal processing circuit for controllably processing a separated luminance component of an extended definition television signal and comprising field memory means for delaying the separated luminance components, a motion detection circuit connected to outputs of said field memory means for detecting frame-to-frame motion in the separated luminance component, a scanning line interpolation circuit connected to said field memory means and having controllable interpolation coefficients controlled in response to outputs from said motion detecting circuit, and a time compression circuit connected to outputs of said scanning line interpolation circuit; a chrominance video signal processing circuit for controllably processing a separated chrominance component of the extended definition television signal; and a normal video signal detection circuit for detecting a number of scanning lines in a field of the extended definition television signal and controlling the processing of said luminance video signal processing circuit and said chrominance video signal processing circuit in response to a detected number of scanning lines.
Claim 3
Dependent Claim
147 words
A television receiver for extended definition television comprising: a luminance video signal processing circuit for controllably processing a separated luminance component of an extended definition television signal; a chrominance video signal processing circuit for controllably processing a separated chrominance component of the extended definition television signal and comprising a field memory for delaying the separated chrominance component, adder means connected to outputs of said field memory for producing a main scanning line signal and an interpolated scanning line signal, and a time compression circuit for compressing the main scanning line signal and the interpolated scanning line signal; and a normal video signal detection circuit for detecting a number of scanning lines in a field of the extended definition television signal and controlling the processing of said luminance video signal processing circuit and said chrominance video signal processing circuit in response to a detected number of scanning lines.
Claim 4
Dependent Claim
147 words
A television receiver for extended definition television comprising: a luminance video signal processing circuit for controllably processing a separated luminance component of an extended definition television signal; a chrominance video signal processing circuit for controllably processing a separated chrominance component of the extended definition television signal and comprising a field memory for delaying the separated chrominance component, adder means connected to outputs of said field memory for producing a main scanning line signal and an interpolated scanning line signal, and a time compression circuit for compressing the main scanning line signal and the interpolated scanning line signal; and a normal video signal detection circuit for detecting a number of scanning lines in a field of the extended definition television signal and controlling the processing of said luminance video signal processing circuit and said chrominance video signal processing circuit in response to a detected number of scanning lines.
Claim 5
Dependent Claim
49 words
A television receiver for extended definition television as claimed in claim 1, wherein said normal video signal detection circuit detects the number of scanning lines of each field of a video signal and generates a determination signal determining whether said video signal is a normal video signal or not.
Claim 6
Dependent Claim
73 words
A television receiver for extended definition television as claimed in claim 1, wherein said motion detection circuit comprises: a filter connected to outputs of said field memory means; an absolute value circuit connected to an output of said filter; a coefficient generator connected to an output of said absolute value circuit; and a coefficient controller connected to said coefficient generator for producing a coefficient control signal fed to said scanning line interpolation circuit.
Claim 7
Dependent Claim
70 words
A television receiver for extended definition television as claimed in claim 4, wherein said coefficient controller receiving a signal from said normal video signal detection circuit controls said scanning line interpolation circuit for interpolation using only data in a current field of the extended definition television signal, when said normal video signal detection circuit generates a detection signal indicating the detection of a signal other than the normal video signal.
Claim 8
Dependent Claim
52 words
A television receiver for extended definition television as claimed in claim 1, wherein said field memory means comprises a first memory, a second memory and a third memory, all said memories being connected in series and outputs thereof being fed to said motion detection circuit and to said scanning line interpolation circuit.