US5227323A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing capacitor elements in an integrated circuit having a compound semiconductor substrate
Assignee: Panasonic Holdings Corp
•
Filing: 1992-06-19
•
Granted: 1993-07-13
•
Expires: 2012-06-19
Abstract
Abstract A capacitor element is formed in an integrated circuit having a compound semiconductor substrate such as a GaAs substrate and having Schottky type FETs formed on the substrate, with the capacitor element being formed by a process in which a lower electrode of a capacitor element and a lower layer portion of the gate electrode of a FET are formed by the same processing step from a high melting-point tungsten compound, a film of insulating material having a high dielectric coefficient is formed overall and is patterned to expose the gate electrode lower layer, and a high-conductance metallic film is then deposited overall and patterned to form an upper electrode of the capacitor element and an upper layer portion of the gate electrode. Capacitor elements and FETs can thereby be formed in such an IC by a simple process, while substantial reduction of the substrate area occupied by each capacitor element can be achieved.
Inventors
- 👤 Mitsuru Nishitsuji
- 👤 Hiromasa Fujimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 12:06
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/02; H10D84/05
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
215 words
A method of forming a capacitor element of an integrated circuit formed upon a compound semiconductor substrate, comprising steps of: (a) forming a first film of electrically conducting material over a main surface of said substrate, said material being a compound of tungsten having a high melting-point, and executing patterning processing of said first electrically conducting film to form a first electrode of said capacitor element; (b) forming a film of an electrically insulating material over said first electrode and said substrate surface, and executing patterning processing of said insulating film to substantially remove said insulating film from said substrate while leaving an insulating film portion covering said first electrode of the capacitor element and forming a through-hole in said insulating film portion; and (c) forming a second film of electrically conducting material over said insulating film portion and said substrate surface, said second film of electrically conducting material consisting of a metal having high electrical conductivity, and executing patterning processing of said second film of electrically conducting material to form a first portion thereof disposed over said insulating film portion to constitute a second electrode of said capacitor element, and a second portion thereof which is electrically connected via said through-hole to said first electrode, to constitute a connecting lead of said first electrode.
Claim 2
Independent Claim
215 words
A method of forming a capacitor element of an integrated circuit formed upon a compound semiconductor substrate, comprising steps of: (a) forming a first film of electrically conducting material over a main surface of said substrate, said material being a compound of tungsten having a high melting-point, and executing patterning processing of said first electrically conducting film to form a first electrode of said capacitor element; (b) forming a film of an electrically insulating material over said first electrode and said substrate surface, and executing patterning processing of said insulating film to substantially remove said insulating film from said substrate while leaving an insulating film portion covering said first electrode of the capacitor element and forming a through-hole in said insulating film portion; and (c) forming a second film of electrically conducting material over said insulating film portion and said substrate surface, said second film of electrically conducting material consisting of a metal having high electrical conductivity, and executing patterning processing of said second film of electrically conducting material to form a first portion thereof disposed over said insulating film portion to constitute a second electrode of said capacitor element, and a second portion thereof which is electrically connected via said through-hole to said first electrode, to constitute a connecting lead of said first electrode.
Claim 3
Dependent Claim
132 words
A method of forming a capacitor element of an integrated circuit according to claim 1, wherein during said step (a) of forming said first electrode of the capacitor element, a lower layer portion of a gate electrode of a field effect transistor is also formed upon said substrate surface, by said patterning processing of said first electrically conducting film, wherein during said step (b) of forming and patterning said insulating film a portion of said insulating film is removed from said lower layer portion of the gate electrode, and wherein during said step (c) of forming said upper electrode of the capacitor element, an upper layer portion of said gate electrode is formed upon said lower layer portion of the gate electrode, by said patterning processing of said second electrically conducting film.
Claim 4
Dependent Claim
33 words
A method of forming a capacitor element of an integrated circuit according to claim 1, wherein said electrically insulating material is selected from a group of materials consisting of TaOx, TiOx, and SrTiOx
Claim 5
Dependent Claim
38 words
A method of forming a capacitor element of an integrated circuit according to claim 1, wherein said first electrically conducting film is formed of a material selected from a group of materials consisting of WSi, WSiN and WN.
Claim 6
Dependent Claim
33 words
A method of forming a capacitor element of an integrated circuit according to claim 2, wherein said electrically insulating material is selected from a group of materials consisting of TaOx, TiOx, and SrTiOx.
Claim 7
Dependent Claim
38 words
A method of forming a capacitor element of an integrated circuit according to claim 2, wherein said first electrically conducting film is formed of a material selected from a group of materials consisting of WSi, WSiN and WN.
References Cited (Backward Citations)
US4937650A
Cited
JPS6394664A
Cited
US5108941A
Cited
JPS63166256A
Cited
JPS6411347A
Cited
JPS6419170A
Cited
JPH0218054A
Cited
JPH03201558A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-07-12 | 1997-01-11 | 1997-07-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-07-12 | 2001-01-11 | 2001-07-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-07-12 | 2005-01-11 | 2005-07-13 | $7700.00 | Window Closed / Lapsed |