Automotive vehicle microprocessor control having grade-holder vehicle speed control

Claim 1

In an automotive vehicle having a powertrain which comprises an internal combustion engine and road-engaging wheels at least some of which are driven by said engine, said engine comprising a throttle, said vehicle comprising brakes that are selectively operable to impose braking torque on said wheels and controls that are selectively operable by a driver of the vehicle comprising a brake control for selectively operating the brakes and an accelerator control for selectively operating the throttle, said vehicle further comprising a microprocessor that is operatively coupled with said powertrain such that said microprocessor can act on information comprising vehicle road speed and a throttle setting commanded by said accelerator control and can distinguish between brake application and non-application, said microprocessor also comprising means for causing said engine to operate along a particular horsepower vs. speed curve selected from a number of such curves for the engine, the improvement which comprises means effective upon the microprocessor detecting concurrence 1) of the throttle setting which is commanded by said accelerator control being within a predetermined range programmed into the microprocessor, 2) of vehicle speed being within a predetermined vehicle speed range programmed into the microprocessor, 3) of vehicle road speed changing at greater than a predetermined rate programmed into the microprocessor, and 4) of a particular status of the brakes, to cause the microprocessor to change engine operation from one of said horsepower vs. speed curves to another.