Patent US5215930A successfully refreshed from Google Patents.
US5215930A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integrated circuit etching of silicon nitride and polysilicon using phosphoric acid
Assignee: Nokia Bell Labs
•
Filing: 1991-10-23
•
Granted: 1993-06-01
•
Expires: 2011-10-23
Abstract
Abstract A process for removing both the silicon nitride layer and polysilicon layer in a poly-buffered LOCOS process which utilizes hot phosphoric acid is disclosed.
Inventors
- 👤 Kuo-Hua Lee
- 👤 Chen-Hua D. Yu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 11:58
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/60; H10P50/66; H10P50/663; H10P50/667; H10P50/20; H10P50/28; H10P50/282; H10P50/283; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/10; H10W10/13; Y; Y10; Y10S; Y10S438/00; Y10S438/906
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
53 words
A method of semiconductor integrated circuit fabrication comprising: forming a layer of polysilicon overlying a substrate; cleaning the exposed surface of said layer of polysilicon; forming a layer of silicon nitride upon said cleaned surface of polysilicon; and etching both said layer of polysilicon and said layer of silicon nitride with phosphoric acid.
Claim 2
Independent Claim
53 words
A method of semiconductor integrated circuit fabrication comprising: forming a layer of polysilicon overlying a substrate; cleaning the exposed surface of said layer of polysilicon; forming a layer of silicon nitride upon said cleaned surface of polysilicon; and etching both said layer of polysilicon and said layer of silicon nitride with phosphoric acid.
Claim 3
Dependent Claim
11 words
The method of claim 1 in which said substrate is silicon.
Claim 4
Dependent Claim
18 words
The method of claim 2 in which said silicon substrate is contacted by a layer of silicon dioxide.
Claim 5
Dependent Claim
32 words
The method of claim 3 in which said layer of silicon dioxide is contacted by said layer of polysilicon and said layer of polysilicon is contacted by said layer of silicon nitride.
Claim 6
Dependent Claim
30 words
The method of claim 1 in which said etch is performed at a temperature and for a time sufficient to remove both said polysilicon layer and said silicon nitride layer.
Claim 7
Dependent Claim
68 words
The method of claim 3 in which the thickness of said layer of silicon dioxide, C, is chosen in accordance with a formula having a predetermined safety factor greater than zero, S, ##EQU2## where C is the thickness of said layer of silicon dioxide, B is the thickness of said layer of polysilicon, A is the thickness of said layer of silicon nitride, S is the safety factor.
Claim 8
Dependent Claim
12 words
The method of claim 1 in which said cleaning step utilizes HF.
Claim 9
Dependent Claim
22 words
The method of claim 5 in which the upper surface of said silicon nitride layer is cleaned prior to said etch step.
Claim 10
Dependent Claim
12 words
The method of claim 8 in which said cleaning step utilizes HF.
Claim 11
Dependent Claim
26 words
The method of claim 5 in which said phosphoric acid is a solution with a concentration between fully concentrated and that concentration at which boiling occurs.
Claim 12
Independent Claim
70 words
A method of semiconductor integrated circuit fabrication comprising: forming an oxide layer upon a silicon substrate; forming a polysilicon layer upon said oxide layer; forming a nitride layer upon said polysilicon layer; forming a field oxide; removing said polysilicon layer and said nitride layer with phosphoric acid to expose said oxide layer; removing said oxide layer to expose said silicon substrate; forming at least one transistor in said silicon substrate.
Claim 13
Independent Claim
70 words
A method of semiconductor integrated circuit fabrication comprising: forming an oxide layer upon a silicon substrate; forming a polysilicon layer upon said oxide layer; forming a nitride layer upon said polysilicon layer; forming a field oxide; removing said polysilicon layer and said nitride layer with phosphoric acid to expose said oxide layer; removing said oxide layer to expose said silicon substrate; forming at least one transistor in said silicon substrate.
References Cited (Backward Citations)
JPS63307743A
Cited
US5002898A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-05-31 | 1996-11-30 | 1997-06-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-05-31 | 2000-11-30 | 2001-06-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-05-31 | 2004-11-30 | 2005-06-01 | $7700.00 | Window Closed / Lapsed |