Patent US1708916A successfully refreshed from Google Patents.
Patent US5206815A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5206815A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for arranging modules in an integrated circuit

Assignee: Philips Semiconductors Inc
•
Filing: 1989-01-13
•
Granted: 1993-04-27
•
Expires: 2009-01-13
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method for generating a layout of a rectangular block of cells for use with other rectangular blocks of cells in an integrated circuit. In the preferred embodiment, the method includes the steps of providing a set of component circuit cells, each of the cells being of generally rectangular shape with predefined dimensions and, then, concatenating the component cells with at least one expandable cell space between non-abutting adjacent edges of at least two of the elements such that the boundary of the concatenated set defines a block of cells having a generally rectangular shape which is coterminous with a second, predefined generally rectangular block of cells.

Inventors

  • 👤 Shawn M. Purcell

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 22:34
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/39

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 114 words
A method for generating a layout of a rectangular block of cells for use with a second rectangular block of cells in an integrated circuit, comprising the steps of: a) providing a set of component circuit cells, each of the cells being of generally rectangular shape with predefined dimensions; b) concatenating the component cells with at least one space cell that is expandable between non-abutting adjacent edges of at least two of the component cells such that the boundary of a concatenated set of component cells and at least one expandable space cell defines a block of cells having a rectangular shape which is coterminous and contiguous with said second rectangular block of cells.
Claim 2
Independent Claim 114 words
A method for generating a layout of a rectangular block of cells for use with a second rectangular block of cells in an integrated circuit, comprising the steps of: a) providing a set of component circuit cells, each of the cells being of generally rectangular shape with predefined dimensions; b) concatenating the component cells with at least one space cell that is expandable between non-abutting adjacent edges of at least two of the component cells such that the boundary of a concatenated set of component cells and at least one expandable space cell defines a block of cells having a rectangular shape which is coterminous and contiguous with said second rectangular block of cells.
Claim 3
Dependent Claim 22 words
A method according to claim 1, wherein: said at least one of the expandable space cells includes wire routings having interconnection lines.
Claim 4
Dependent Claim 21 words
A method according to claim 2, including the step of specifying the location of at least one of the component cells.
Claim 5
Dependent Claim 99 words
An integrated circuit produced by a method comprising the steps of: a) providing a set of component circuit cells, each of which has a generally rectangular shape with predefined dimensions; b) concatenating the component cells with at least one space cell that is expandable between non-abutting adjacent edges of at least two of the component cells such that the boundary of a concatenated set of component cells and at least one expandable space cell defines a block of cells having a rectangular shape which is coterminous and contiguous with a second block of cells having the same rectangular shape.
Claim 6
Dependent Claim 99 words
An integrated circuit produced by a method comprising the steps of: a) providing a set of component circuit cells, each of which has a generally rectangular shape with predefined dimensions; b) concatenating the component cells with at least one space cell that is expandable between non-abutting adjacent edges of at least two of the component cells such that the boundary of a concatenated set of component cells and at least one expandable space cell defines a block of cells having a rectangular shape which is coterminous and contiguous with a second block of cells having the same rectangular shape.
Claim 7
Dependent Claim 28 words
An integrated circuit produced by a method according to claim 4, wherein; said expandable space cells are comprised of white spaces and wire routing spaces including interconnection lines.
Claim 8
Independent Claim 149 words
A method of generating an integrated circuit design layout, comprising the steps of: providing at least one component circuit cell having a predefined layout; designating at least one instance of the at least one cell in the integrated circuit design layout; providing expandable space cells for insertion between adjacent instances of the component cells; defining one or more slices, each slice comprised of at least one of said instances of the component cells; defining a hierarchy for determining the positions of said instances of said cells in said integrated circuit design layout, including the steps of a) resolving the positions of fixed instances of the cells; b) resolving the positions of instances of said cells that are dependent on the positions of previously resolved instances; and c) defining the dimensions of expandable space cells whereby contiguous slices are dimensionally equal in at least one dimension of width and height.
Claim 9
Independent Claim 149 words
A method of generating an integrated circuit design layout, comprising the steps of: providing at least one component circuit cell having a predefined layout; designating at least one instance of the at least one cell in the integrated circuit design layout; providing expandable space cells for insertion between adjacent instances of the component cells; defining one or more slices, each slice comprised of at least one of said instances of the component cells; defining a hierarchy for determining the positions of said instances of said cells in said integrated circuit design layout, including the steps of a) resolving the positions of fixed instances of the cells; b) resolving the positions of instances of said cells that are dependent on the positions of previously resolved instances; and c) defining the dimensions of expandable space cells whereby contiguous slices are dimensionally equal in at least one dimension of width and height.
Claim 10
Dependent Claim 55 words
A method according to claim 6, including the step of defining the location of an instance by either fixing the relative position of the instance in said layout, making the position of the instance dependent on the position of another instance, or aligning the instance relative to at least one data port of another instance.

References Cited (Backward Citations)

US4686629A Cited
US4777606A Cited
US4858143A Cited
US4815003A Cited
US4931946A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-04-26 1996-10-26 1997-04-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-04-26 2000-10-26 2001-04-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-04-26 2004-10-26 2005-04-27 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag