Voltage controlled oscillator and an operating method thereof

Claim 2

A voltage controlled oscillator, comprising: analog to digital converting means for converting an input voltage to a digital signal; storage means for storing in advance frequency data corresponding to frequencies in respective addresses, receiving said digital signal, and reading out a frequency data from an address designated by said digital signal; clock pulse generating means for generating clock pulses; counting means for counting said clock pulses generated from said clock pulse generating means to provide a count data indicating count value; and comparing means for comparing the frequency data read out from said storage means with the count data provided from said counting means, to provide a signal indicating comparison result, and to reset said counting means when said frequency data coincides with said count data.

Claim 3

The voltage controlled oscillator according to claim 1, further comprising: frequency-dividing means for frequency-dividing said signal indicating comparison result provided from said comparing means.

Claim 4

The voltage controlled oscillator according to claim 1, further comprising: data holding means for holding temporarily said frequency data read out from said storage means.

Claim 5

The voltage controlled oscillator according to claim 1, wherein said storage means comprises non-volatile memory means.

Claim 6

The voltage controlled oscillator according to claim 1, wherein said storage means comprises electrically programmable non-volatile memory means.

Claim 7

The voltage controlled oscillator according to claim 18, wherein said comparing means further comprises: NOR gate means for receiving outputs of said plurality of exclusive OR gate means.

Claim 8

The voltage controlled oscillator according to claim 6, wherein said comparing means further comprises: flipflop means for providing a pulse signal having a prescribed width in response to an output of said NOR gate means to apply said pulse signal to said frequency-dividing means, and to apply said pulse signal to said counting means as a reset signal.

Claim 9

An operating method for a voltage controlled oscillator comprising the steps of: storing in advance at a plurality of addresses of a digital memory a plurality of frequency data corresponding to a plurality of frequencies; converting an external analog input signal to a digital signal; inputting said digital signal to said digital memory and reading out said frequency data at an address location corresponding to said digital signal; generating clock pulses; counting said generating clock pulses to generate a count data indicating count value; and comparing said read out frequency data with said generated count data to provide a signal indicating comparison result, and to reset said counting when said read out frequency coincides with said generated count data.

Claim 10

An operating method for a voltage controlled oscillator comprising the steps of: storing in advance at a plurality of addresses of a digital memory a plurality of frequency data corresponding to a plurality of frequencies; converting an external analog input signal to a digital signal; inputting said digital signal to said digital memory and reading out said frequency data at an address location corresponding to said digital signal; generating clock pulses; counting said generating clock pulses to generate a count data indicating count value; and comparing said read out frequency data with said generated count data to provide a signal indicating comparison result, and to reset said counting when said read out frequency coincides with said generated count data.

Claim 11

The operation method according to claim 8, comprising the step of: frequency-dividing said signal indicating comparison result.

Claim 14

The method of claim 10, wherein the step of varying is carried out in response to an externally developed control parameter.

Claim 15

The method of claim 10, wherein said prestored data are supplied by a microprocessor.

Claim 16

The method of claim 11, wherein said plurality of prestored data are varied dynamically during conversion.

Claim 17

A voltage controlled oscillator, comprising: an analog-to-digital converter for converting an input voltage to a digital signal; storage means for prestoring in storage locations corresponding to respective addresses frequency data corresponding to frequencies and for reading out frequency data corresponding to frequencies and for reading out frequency data from an address designated by said digital signal; a clock pulse generator for generating clock pulses; a counter for counting said clock pulses generated from said clock pulse generating means to provide a count data indicating count value; means for supplying address frequency data to said storage means and for changing said address frequency data; and a comparator for comparing the frequency data read out from said storage means with the count data provided from said counting means, to provide a signal indicating a comparison result, and to reset said counting means when said frequency data coincides with said count data.

Claim 18

A voltage controlled oscillator, comprising: an analog-to-digital converter for converting an input voltage to a digital signal; storage means for prestoring in storage locations corresponding to respective addresses frequency data corresponding to frequencies and for reading out frequency data corresponding to frequencies and for reading out frequency data from an address designated by said digital signal; a clock pulse generator for generating clock pulses; a counter for counting said clock pulses generated from said clock pulse generating means to provide a count data indicating count value; means for supplying address frequency data to said storage means and for changing said address frequency data; and a comparator for comparing the frequency data read out from said storage means with the count data provided from said counting means, to provide a signal indicating a comparison result, and to reset said counting means when said frequency data coincides with said count data.

Claim 19

The oscillator of claim 14, wherein said means for supplying address frequency data further comprises means for changing said address frequency data dynamically during analog-to-frequency conversion by said converter.

Claim 20

A voltage controlled oscillator, comprising: analog to digital converting means for converting an input voltage to a digital signal; storage means for storing a plurality of frequency information receiving said digital signal, and in response thereto, outputting corresponding stored frequency information from among said plurality of frequency information; counting means for counting clock pulses and generating count information; and means for generating an output signal based upon said frequency information from said storage means and said count information to provide a signal indication comparison result, and to reset said counting means when said frequency information coincides with said count information.

Claim 21

A voltage controlled oscillator, comprising: analog to digital converting means for converting an input voltage to a digital signal; storage means for storing a plurality of frequency information receiving said digital signal, and in response thereto, outputting corresponding stored frequency information from among said plurality of frequency information; counting means for counting clock pulses and generating count information; and means for generating an output signal based upon said frequency information from said storage means and said count information to provide a signal indication comparison result, and to reset said counting means when said frequency information coincides with said count information.

Claim 22

The method of claim 11, wherein said prestored data are supplied by a microprocessor.

Claim 23

A voltage controlled oscillator, comprising: analog to digital converting means for converting an input voltage to a digital signal; storage means for storing in advance frequency data corresponding to frequencies in respective addresses, receiving said digital signal, and reading out a frequency data from an address designated by said digital signal; clock pulse generating means for generating clock pulses; counting means for counting said clock pulses generated from said clock pulse generating means to provide a count data indicating count value; and comparing means for comparing the frequency data read out from said storage means with the count data provided from said counting means, to provide a signal indicating comparison result, and to reset said counting means when said frequency data coincides with said count data, wherein each of said frequency data has a plurality of bits, and each of said count data has the same plurality of bits as that of said frequency data, and said comparing means includes; a plurality of exclusive OR gate means each receiving a corresponding bit of said frequency data and a corresponding bit of said count data.

Claim 24

A voltage controlled oscillator, comprising: analog to digital converting means for converting an input voltage to a digital signal; storage means for storing in advance frequency data corresponding to frequencies in respective addresses, receiving said digital signal, and reading out a frequency data from an address designated by said digital signal; clock pulse generating means for generating clock pulses; counting means for counting said clock pulses generated from said clock pulse generating means to provide a count data indicating count value; and comparing means for comparing the frequency data read out from said storage means with the count data provided from said counting means, to provide a signal indicating comparison result, and to reset said counting means when said frequency data coincides with said count data, wherein each of said frequency data has a plurality of bits, and each of said count data has the same plurality of bits as that of said frequency data, and said comparing means includes; a plurality of exclusive OR gate means each receiving a corresponding bit of said frequency data and a corresponding bit of said count data.