Patent US5202852A successfully refreshed from Google Patents.
US5202852A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Programmable read only memory card with improved buffer circuit
Assignee: Mitsubishi Electric Corp
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Filing: 1991-06-10
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Granted: 1993-04-13
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Expires: 2011-06-10
Abstract
Abstract The read only memory card into which data can be written includes a bidirectional buffer connected to a data bus and a read/write control circuit which controls the direction of data transmission by the buffer. The control circuit determines whether data is to be written into or read from the memory based on the voltage on a writing power supply line and an output enable signal line. The electrostatic discharge resistance of the read only memory card is thereby at least ten times higher than that of the conventional memory card in which the data bus is directly connected to external equipment.
Inventors
- 👤 Masaharu Mizuta
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 07:43
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/14; G11C17/18
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
437 words
A programmable read only memory card comprising: memory means, including at least one programmable read only memory having an external data port that can withstand an electrostatic discharge up to a first magnitude without damage, for storing data written into said memory means; a connector for electrical connection of said programmable read only memory card to external circuitry; distinct input and output lines connected between said memory means and said connector including a power supply line for supplying power to said programmable read only memory card, a ground line for connection to an electrical ground, a write power supply line for supplying power during writing in said memory means, an address bus for supplying an address for reading data from and writing data into said memory means, a data bus for supplying data to and transmitting data from said programmable read only memory card, a card enable control line for controlling operation of said programmable read only memory card, and an output enable control line for controlling output of data from said programmable read only memory card; a bidirectional buffer circuit connected to said data bus for selectively enabling transmission of data to said at least one programmable read only memory for writing data into said at least one programmable read only memory and transmission of data from said at least one programmable read only memory in response to a directional control signal, said bidirectional buffer circuit withstanding an electrostatic discharge up to a second magnitude without damage, the second magnitude exceeding the first magnitude; and a read/write control circuit connected to said output enable control line and said write power supply line for controlling writing of data into and reading of stored data from said at least one programmable read only memory in response to the voltages on said output enable control line and said write power supply line and for generating the directional control signal supplied to said bidirectional buffer circuit in response to the voltages of said output enable control line and said write power supply line, said read/write control circuit including: a first differential amplifier having a first input connected to the write power supply line and a second input connected to a first reference voltage, the first differential amplifier generating an output signal indicative of a difference between the voltage on the write power supply line and the reference voltage; and control logic means connected to said output enable control line and receiving the output signal from said first differential amplifier for outputting the directional control signal in response to the voltage on the output enable control line and the output signal.
Claim 2
Dependent Claim
437 words
A programmable read only memory card comprising: memory means, including at least one programmable read only memory having an external data port that can withstand an electrostatic discharge up to a first magnitude without damage, for storing data written into said memory means; a connector for electrical connection of said programmable read only memory card to external circuitry; distinct input and output lines connected between said memory means and said connector including a power supply line for supplying power to said programmable read only memory card, a ground line for connection to an electrical ground, a write power supply line for supplying power during writing in said memory means, an address bus for supplying an address for reading data from and writing data into said memory means, a data bus for supplying data to and transmitting data from said programmable read only memory card, a card enable control line for controlling operation of said programmable read only memory card, and an output enable control line for controlling output of data from said programmable read only memory card; a bidirectional buffer circuit connected to said data bus for selectively enabling transmission of data to said at least one programmable read only memory for writing data into said at least one programmable read only memory and transmission of data from said at least one programmable read only memory in response to a directional control signal, said bidirectional buffer circuit withstanding an electrostatic discharge up to a second magnitude without damage, the second magnitude exceeding the first magnitude; and a read/write control circuit connected to said output enable control line and said write power supply line for controlling writing of data into and reading of stored data from said at least one programmable read only memory in response to the voltages on said output enable control line and said write power supply line and for generating the directional control signal supplied to said bidirectional buffer circuit in response to the voltages of said output enable control line and said write power supply line, said read/write control circuit including: a first differential amplifier having a first input connected to the write power supply line and a second input connected to a first reference voltage, the first differential amplifier generating an output signal indicative of a difference between the voltage on the write power supply line and the reference voltage; and control logic means connected to said output enable control line and receiving the output signal from said first differential amplifier for outputting the directional control signal in response to the voltage on the output enable control line and the output signal.
Claim 3
Dependent Claim
72 words
A programmable read only memory card according to claim 1 wherein 8-bit data is written into said at least one programmable read only memory, said bidirectional buffer circuit has a directional control terminal and a pair of input/output ports, each input/output port including eight bidirectional ports, said read/write control circuit outputting the direction control signal supplied to said directional control terminal and designating reading when the conditions for writing are not satisfied.
Claim 4
Dependent Claim
60 words
A programmable read only memory card according to claim 2 wherein said control logic means includes a second differential amplifier having a first input connected to said output enable line and a second input connected to a second reference voltage and a NAND circuit receiving output signals from said first and second differential amplifiers for outputting the directional control signal.
Claim 5
Dependent Claim
33 words
A programmable read only memory card according to claim 1 wherein said at least one programmable read only memory and said bidirectional buffer and read/write control circuits are formed in a single chip.
Claim 6
Dependent Claim
34 words
A programmable read only memory card according to claim 1 comprising two chips in which said at least one programmable read only memory and said bidirectional buffer and read/write control circuits are respectively formed.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-04-12 | 1996-10-12 | 1997-04-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-04-12 | 2000-10-12 | 2001-04-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-04-12 | 2004-10-12 | 2005-04-13 | $7700.00 | Window Closed / Lapsed |