Process for actuation of multi-level digital modulation by a digital signal processor

Claim 2

A multi-level digital modulation process wherein a serial flow having a bit frequency fb is parallelized to form first words of N bits called symbols having a symbol frequency fs, and wherein from the first words second and third words are generated in synchronism respectively belonging to a channel termed "in phase" and a channel termed "in quadrature" representing components along two orthogonal axes of a vector which digitally modulates a sinusoidal carrier both in phase and in amplitude, comprising the steps of: digitally filtering said second and third words having the symbol frequency fs and obtaining in correspondence therewith fourth and fifth filtered words, said digital filtering being carried out at a sampling frequency fc synchronous with said symbol frequency fs and corresponding to said symbol frequency fs multiplied by an appropriate number K greater than 2; negating the value of said fourth and fifth filtered words and obtaining in correspondence therewith sixth and seventh negated filtered words; and cyclically selecting in order, at each period of said sampling frequency fc, one of said fourth, fifth, sixth, and seventh words which provide a sequence of discrete samples of said digitally modulated sinusoidal carrier.

Claim 3

A multi-level digital modulation process according to claim 1 wherein said digital filtering of said second and third words is of a transverse type with a finite pulse response in which the fourth and fifth filtered words are obtained by multiplying a first sequence of a number p of digital coefficients by a respective second and third sequence of a number M=p/K of said second or third words, and summing; and wherein at each period of the frequency fs, a latest of said second and third words all products obtained in correspondence with said second and third words enter into the respective second and third sequence and an oldest of said second and third words are deleted from the respective sequences.

Claim 4

A multi-level digital modulation process according to claim 2 wherein the multiplication of said first sequence by the respective second and third sequence is implemented by multiplying each respective second and third word, identified by values of a first index d varying from 1 to M by increments of one unit in a period of said frequency fc, by a coefficient identified by values of a second index y calculated by the following expression: y=KX(d-1)+NCAMP+1 where NCAMP is a third index varying from zero to K by increments of one unit at each period of the frequency fc.

Claim 5

A multi-level digital modulation system, comprising: means for providing a serial flow having a bit frequency fb which is parallelized to form first words of N bits called symbols having a symbol frequency fs; means for generating from said first words second and third words synchronous with the first words and respectively belonging to a channel termed "in phase" and a channel termed "in quadrature" representing components along two orthogonal axes of a vector which digitally modulates a sinusoidal carrier both in phase and in amplitude; means for digitally filtering said second and third words having a symbol frequency fs, obtaining corresponding therewith fourth and firth filtered words, said digital filtering being carried out at a sampling frequency fc synchronous with said symbol frequency fs and corresponding to said symbol frequency fs multiplied by an appropriate number K greater than 2; means for negating a value of said fourth an fifth filtered words and obtaining in correspondence therewith sixth and seventh negated filtered words; and means for cyclically selecting in order, at each period of said sampling frequency fc, one of said fourth, fifth, sixth, and seventh words which provide a sequence of discrete samples of said digitally modulated sinusoidal carrier.

Claim 6

A multi-level digital modulation system, comprising: means for providing a serial flow having a bit frequency fb which is parallelized to form first words of N bits called symbols having a symbol frequency fs; means for generating from said first words second and third words synchronous with the first words and respectively belonging to a channel termed "in phase" and a channel termed "in quadrature" representing components along two orthogonal axes of a vector which digitally modulates a sinusoidal carrier both in phase and in amplitude; means for digitally filtering said second and third words having a symbol frequency fs, obtaining corresponding therewith fourth and firth filtered words, said digital filtering being carried out at a sampling frequency fc synchronous with said symbol frequency fs and corresponding to said symbol frequency fs multiplied by an appropriate number K greater than 2; means for negating a value of said fourth an fifth filtered words and obtaining in correspondence therewith sixth and seventh negated filtered words; and means for cyclically selecting in order, at each period of said sampling frequency fc, one of said fourth, fifth, sixth, and seventh words which provide a sequence of discrete samples of said digitally modulated sinusoidal carrier.

Claim 7

A system according to claim 4 wherein said means for providing, means for generating, means for digitally filtering, means for negating, and means for cyclically selecting comprise a single processor means for processing digital signals in real time.

Claim 8

A system according to claim 4 wherein said means for digitally filtering the second and third words are two equal transverse digital filters with a finite pulse response having a number p of digital coefficients forming a first sequence, wherein said fourth and fifth filtered words are obtained by multiplying said first sequence by a respective second and a third sequence of a number M=p/K of said second or third words, and summing all products obtained in correspondence with said second and third words; and wherein, at each period of the frequency fs, a latest of said second and third words enter into the respective second and third sequence and an oldest of said second and third words are deleted from the respective sequences.

Claim 9

A system according to claim 6 wherein the multiplication of said first sequence by the respective second and third sequence is implemented by multiplying each respective second and third word, identified by values of a first index d varying from 1 to M by increments of one unit in a period of said frequency fc, by a coefficient identified by values of a second index y calculated by the following expression: y=KX(d-1)+NCAMP+1 where NCAMP is a third index varying from zero to K by increments of one unit at each period of the frequency fc.