Emulator circuit and method for generating CMOS level clock input

Claim 2

An emulator for generating a CMOS level clock signal from a provided set of RC components comprising: a) microcontroller means for generating a sawtooth wave form clock input signal from a provided RC network; and b) an emulation circuit responsive to said sawtooth wave form signal for forming a square wave output signal having a frequency equal to a frequency of said sawtooth wave form signal.

Claim 3

An emulator as in claim 1 wherein: a) said emulation circuit is connected to the junction of a resistor and a capacitor of said provided RC network.

Claim 4

An emulator as in claim 2 wherein said emulation circuit includes: a) means for comparing said sawtooth waveform signal with a reference signal to form a square waveform signal; and b) means for modifying said square wave form signal received from said comparing means to provide an output signal usable as a CMOS level clock signal.

Claim 5

An emulator as in claim 3 wherein said comprising means is a comparator having a (+) non-inverting input responsive to said sawtooth waveform signal and a (-) inverting input responsive to said reference voltage, said emulation circuit further includes: a) a high input impedance circuit disposed connected between of said sawtooth waveform generating means and said (+) non-inverting input of said comparator.

Claim 6

An emulator as in claim 4 wherein said emulation circuit includes means for tuning the duty cycle of said square waveform signal formed by said comparing means.

Claim 7

An emulator as in claim 5 wherein said tuning means provides said reference signal.

Claim 8

An emulator for generating a CMOS level clock signal from RC components comprising in operative combination: a) a first emulation chip for accurately generating a sawtooth waveform form signal from a provided RC network signal input; b) a CMOS emulation circuit responsive to said first emulation chip for forming a square waveform signal, said CMOS emulation circuit having circuit elements including: i) a first resistor; ii) a comparator; iii) means for connecting said first resistor between a resistor-capacitor junction of an RC network and a (+) non-inverting input of said comparator; iv) a second resistor; v) means for directing non-inverting signal output of said comparator through said second resistor to provide feedback to said (+) non-inverting input; (vi) a reference voltage connected to a (-) inverting input of said comparator; vii) an inverter connected to an output of said comparator; and c) said circuit elements of said CMOS emulation circuit having parameters selected so that, when said CMOS emulation circuit is connected to said first emulation chip at said resistor-capacitor junction, said sawtooth waveform input signal generated by said RC network is formed into a square wave CMOS level clock signal at the output of said inverter.

Claim 9

An emulator for generating a CMOS level clock signal from RC components comprising in operative combination: a) a first emulation chip for accurately generating a sawtooth waveform form signal from a provided RC network signal input; b) a CMOS emulation circuit responsive to said first emulation chip for forming a square waveform signal, said CMOS emulation circuit having circuit elements including: i) a first resistor; ii) a comparator; iii) means for connecting said first resistor between a resistor-capacitor junction of an RC network and a (+) non-inverting input of said comparator; iv) a second resistor; v) means for directing non-inverting signal output of said comparator through said second resistor to provide feedback to said (+) non-inverting input; (vi) a reference voltage connected to a (-) inverting input of said comparator; vii) an inverter connected to an output of said comparator; and c) said circuit elements of said CMOS emulation circuit having parameters selected so that, when said CMOS emulation circuit is connected to said first emulation chip at said resistor-capacitor junction, said sawtooth waveform input signal generated by said RC network is formed into a square wave CMOS level clock signal at the output of said inverter.

Claim 10

An emulator as in claim 7 wherein said CMOS emulation circuit includes means for tuning the duty cycle of said square wave form signal.

Claim 11

An emulator as in claim 8 wherein said tuning means includes: a) a third and fourth resistor, connected in series to provide said reference voltage source; and b) means for connecting said (-) inverting input of said comparator to a junction of said serially connected resistors.

Claim 12

An emulator as in claim 7 wherein said first emulation chip is a microcontroller having an RC clock input mask option.

Claim 13

An emulator as in claim 10 further including: a) a second emulation chip responsive to said CMOS level clock signal generated by said inverter; and b) said second emulation chip including support for a CMOS level clock for emulating all the functions of a dedicated microcontroller chip having RC clock input mask option originally intended for use with said provided RC network.

Claim 18

A method as in claim 13, including the step a) tuning the duty cycle of said inverted square waveform signal output.

Claim 19

A method as in claim 14, including the step of: a) inverting said inverted square wave form output signal to provide a CMOS level clock signal suitable for use as an input signal for a microcontroller.

Claim 20

A method as in claim 15, including the step of: a) boosting said square waveform output signal to a CMOS compatible clock input level.

Claim 21

An emulator for generating a CMOS level clock signal from RC components comprising: a) means for generating a sawtooth waveform clock input signal from RC network signal input, said sawtooth waveform generating means disposed connected to the junction of a resistor and a capacitor of said provided RC network; b) an emulation circuit responsive to said sawtooth waveform signal for forming a square wave output signal having a frequency equal to a frequency of said sawtooth wave form signal, and wherein said emulation circuit includes: i) means for comparing said sawtooth waveform signal with a reference signal to form a square wave form signal, said comparing means includes a comparator having a (+) non-inverting input responsive to said sawtooth waveform signal and a (-) inverting input responsive to said reference voltage; ii) a high input impedance circuit disposed connected between of said sawtooth waveform generating means and said (+) non-inverting input of said comparator; and iii) means for modifying said square waveform signal received from said comparing means to provide a output signal usable as a CMOS level clock signal.

Claim 22

An emulator for generating a CMOS level clock signal from RC components comprising: a) means for generating a sawtooth waveform clock input signal from RC network signal input, said sawtooth waveform generating means disposed connected to the junction of a resistor and a capacitor of said provided RC network; b) an emulation circuit responsive to said sawtooth waveform signal for forming a square wave output signal having a frequency equal to a frequency of said sawtooth wave form signal, and wherein said emulation circuit includes: i) means for comparing said sawtooth waveform signal with a reference signal to form a square wave form signal, said comparing means includes a comparator having a (+) non-inverting input responsive to said sawtooth waveform signal and a (-) inverting input responsive to said reference voltage; ii) a high input impedance circuit disposed connected between of said sawtooth waveform generating means and said (+) non-inverting input of said comparator; and iii) means for modifying said square waveform signal received from said comparing means to provide a output signal usable as a CMOS level clock signal.

Claim 23

An emulator as in claim 17 wherein said emulator includes means for tuning the duty cycle of said square wave form signal formed by said comparing means.

Claim 24

An emulator as in claim 18 wherein said tuning means provides said reference signal.