Patent US5200358A successfully refreshed from Google Patents.
US5200358A
Expired / Lapsed
US
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Integrated circuit with planar dielectric layer
Assignee: Nokia Bell Labs
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Filing: 1991-11-15
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Granted: 1993-04-06
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Expires: 2011-11-15
Abstract
Abstract Self-aligned contacts are formed to regions between closely spaced features by a method which uses differential etch rates between first and second dielectrics deposited over the closely spaced features.
Inventors
- 👤 Cheryl A. Bollinger
- 👤 Min-Liang Chen
- 👤 David P. Favreau
- 👤 Kurt G. Steiner
- 👤 Daniel J. Vitkavage
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 09:17
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/069; H10W20/071; H10W20/081
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
176 words
A method of semiconductor integrated circuit fabrication comprising the steps of fabricating spaced apart features on a substrate, said features comprising a dielectric top layer and conducting bottom layer; and making an electrical contact to at least a portion of the substrate between the features Characterized in that said making comprises depositing first and second dielectrics over said features, etching said dielectrics with a blanket etchback after said second dielectric has been deposited, said second dielectric etching more rapidly than said first dielectric; opening a contact window in said first and said second dielectric layers to said at least a portion of the substrate, said opening step comprises depositing and patterning a resist to form a window larger than the spacing between said features and which exposes at least a portion of said dielectrics, and etching said exposed dielectrics to reveal at least a portion of the substrate area; and electrically contacting said portion of the substrate, whereby said etching rate difference between said first and second dielectrics prevents formation of contacts to said bottom layer.
Claim 2
Independent Claim
176 words
A method of semiconductor integrated circuit fabrication comprising the steps of fabricating spaced apart features on a substrate, said features comprising a dielectric top layer and conducting bottom layer; and making an electrical contact to at least a portion of the substrate between the features Characterized in that said making comprises depositing first and second dielectrics over said features, etching said dielectrics with a blanket etchback after said second dielectric has been deposited, said second dielectric etching more rapidly than said first dielectric; opening a contact window in said first and said second dielectric layers to said at least a portion of the substrate, said opening step comprises depositing and patterning a resist to form a window larger than the spacing between said features and which exposes at least a portion of said dielectrics, and etching said exposed dielectrics to reveal at least a portion of the substrate area; and electrically contacting said portion of the substrate, whereby said etching rate difference between said first and second dielectrics prevents formation of contacts to said bottom layer.
Claim 3
Dependent Claim
16 words
A method as recited in claim 1 in which said first dielectric comprises an undoped dielectric.
Claim 4
Dependent Claim
29 words
A method as recited in claim 1 in which said second dielectric comprises at least one member selected from the group consisting of BPSG, BPTEOS and spin on glasses.
Claim 5
Dependent Claim
18 words
A method as recited in claim 1 in which said first and said second dielectrics comprise conformal dielectrics.
Claim 6
Dependent Claim
19 words
A method as recited in claim 1 comprising the further step of forming local interconnects on said second dielectric.
References Cited (Backward Citations)
US5037777A
Cited
US5069747A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1996-04-05 | 1996-10-05 | 1997-04-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2000-04-05 | 2000-10-05 | 2001-04-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2004-04-05 | 2004-10-05 | 2005-04-06 | $7700.00 | Window Closed / Lapsed |