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US5195100A Expired / Lapsed US ⏱️ 0.0 years remaining

Non-volatile memory storage of write operation identifier in data sotrage device

Assignee: EMC Corp
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Filing: 1990-03-02
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Granted: 1993-03-16
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Expires: 2010-03-02
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Abstract

Abstract A method and apparatus are provided for detecting and correcting various data errors that may arise in a mass data storage apparatus comprising a set of physical mass storage devices operating as one or more larger logical mass storage devices. More particularly, there is provided a method and apparatus for determining, on restoration of power to a device set, whether or not a write operation was interrupted when power was removed, and for reconstructing any data that may be inconsistent because of the removal of power.

Inventors

  • 👤 Randy H. Katz
  • 👤 David T. Powers
  • 👤 David H. Jaffe
  • 👤 Joseph S. Glider
  • 👤 Thomas E. Idleman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 11:28
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/08; G06F11/10; G06F11/1076; G06F11/14; G06F11/1402; G06F11/1415; G06F11/1441; G06F11/1443; G06F2201/00; G06F2201/835; G06F2211/00; G06F2211/10; G06F2211/1002; G06F2211/104

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 353 words
A memory for a computer system having a central processing unit, the memory comprising: a plurality of physical blocks of memory for storing data, said physical blocks being distributed among a set of physical devices operable as one or more logical units; multiple storage device controller means connected to the set of physical devices for routing data to said physical blocks of memory in response to a write request from the central processing unit, said multiple storage device controller means including processor means for controlling the routing of data to said physical blocks; nonvolatile storage means, including a programmable semiconductor memory circuit coupled to said processor means in the multiple storage device controller means, for retaining programmed information in the absence of power to the multiple storage device controller means; first means for programming the nonvolatile storage means with information indicating that a write operation involving the plurality of blocks of data is in progress and information uniquely identifying the write operation; second means for storing with each of the plurality of blocks of data information uniquely identifying the most recent write operation involving the block of data; means, responsive to the completion of a write operation, for erasing from the nonvolatile storage means the information that indicates that the write operation was in progress; means, responsive to a power failure in the multiple storage device controller means which interrupts execution of a write request by said processor means, for checking whether the information in the nonvolatile storage means that indicates that the write operation was in progress has been erased; and means for checking, for each block of data involved in a write operation in progress at the time of a power failure in the multiple storage device controller means, the information stored by said fist storing means uniquely identifying the write operation with the information stored with the block in memory by said second storing means uniquely identifying the most recent write operation involving the block of data to determine if there is a disparity indicating that the block in memory was not stored during the power failure interrupted write operation.
Claim 2
Dependent Claim 353 words
A memory for a computer system having a central processing unit, the memory comprising: a plurality of physical blocks of memory for storing data, said physical blocks being distributed among a set of physical devices operable as one or more logical units; multiple storage device controller means connected to the set of physical devices for routing data to said physical blocks of memory in response to a write request from the central processing unit, said multiple storage device controller means including processor means for controlling the routing of data to said physical blocks; nonvolatile storage means, including a programmable semiconductor memory circuit coupled to said processor means in the multiple storage device controller means, for retaining programmed information in the absence of power to the multiple storage device controller means; first means for programming the nonvolatile storage means with information indicating that a write operation involving the plurality of blocks of data is in progress and information uniquely identifying the write operation; second means for storing with each of the plurality of blocks of data information uniquely identifying the most recent write operation involving the block of data; means, responsive to the completion of a write operation, for erasing from the nonvolatile storage means the information that indicates that the write operation was in progress; means, responsive to a power failure in the multiple storage device controller means which interrupts execution of a write request by said processor means, for checking whether the information in the nonvolatile storage means that indicates that the write operation was in progress has been erased; and means for checking, for each block of data involved in a write operation in progress at the time of a power failure in the multiple storage device controller means, the information stored by said fist storing means uniquely identifying the write operation with the information stored with the block in memory by said second storing means uniquely identifying the most recent write operation involving the block of data to determine if there is a disparity indicating that the block in memory was not stored during the power failure interrupted write operation.
Claim 3
Independent Claim 350 words
A method of storing data in a memory for a computer system having a central processing unit, said memory comprising a set of physical storage devices operable as one or more logical units, the method comprising the steps of: dividing said memory into a plurality of physical blocks of memory, said physical blocks being distributed among the set of physical storage devices operable as one or more logical units; routing data to said physical blocks of memory in response to a write request from the central processing unit using a multiple storage device controller means connected to the set of physical storage devices; providing a nonvolatile storage means, including a programmable semiconductor memory circuit in the multiple storage device controller, for retaining programmed information in the absence of power to the multiple storage device controller means; programming said nonvolatile storage means with information indicating that a write operation involving the plurality of blocks of data is in progress and information uniquely identifying the write operation; storing with each of the plurality of blocks of data information uniquely identifying the most recent write operation involving the block of data; in response to the completion of a write operation, erasing the information in the non-volatile storage means that indicates that the write operation was in progress; in response to a power failure in the multiple storage device controller means which interrupts execution of a write request, checking whether the information that indicates that the write operation was in progress has been erased, and if it has not been erased, then initiating steps to determine what portion of information to be stored in physical blocks of memory for that write operation was not stored; and checking for each block of data involved in the write operation the information stored in the nonvolatile storage means uniquely identifying the write operation with the information stored with the block in memory uniquely identifying the most recent write operation involving the block of data, and if there is a disparity, then concluding that the block in memory was not stored during the power failure interrupted write operation.
Claim 4
Independent Claim 350 words
A method of storing data in a memory for a computer system having a central processing unit, said memory comprising a set of physical storage devices operable as one or more logical units, the method comprising the steps of: dividing said memory into a plurality of physical blocks of memory, said physical blocks being distributed among the set of physical storage devices operable as one or more logical units; routing data to said physical blocks of memory in response to a write request from the central processing unit using a multiple storage device controller means connected to the set of physical storage devices; providing a nonvolatile storage means, including a programmable semiconductor memory circuit in the multiple storage device controller, for retaining programmed information in the absence of power to the multiple storage device controller means; programming said nonvolatile storage means with information indicating that a write operation involving the plurality of blocks of data is in progress and information uniquely identifying the write operation; storing with each of the plurality of blocks of data information uniquely identifying the most recent write operation involving the block of data; in response to the completion of a write operation, erasing the information in the non-volatile storage means that indicates that the write operation was in progress; in response to a power failure in the multiple storage device controller means which interrupts execution of a write request, checking whether the information that indicates that the write operation was in progress has been erased, and if it has not been erased, then initiating steps to determine what portion of information to be stored in physical blocks of memory for that write operation was not stored; and checking for each block of data involved in the write operation the information stored in the nonvolatile storage means uniquely identifying the write operation with the information stored with the block in memory uniquely identifying the most recent write operation involving the block of data, and if there is a disparity, then concluding that the block in memory was not stored during the power failure interrupted write operation.

References Cited (Backward Citations)

US4525800A Cited
US4530054A Cited
US4814971A Cited
US4922456A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-03-15 1996-09-14 1997-03-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-03-15 2000-09-14 2001-03-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-03-15 2004-09-14 2005-03-16 $7700.00 Window Closed / Lapsed

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