Solder plate reflow method for forming solder-bumped terminals

Claim 1

A method for forming a solder bumped terminal on a planar dielectric substrate comprising fabricating a terminal on the substrate, said terminal comprising a terminal pad adapted for receiving a solder bump and a linear runner section connected to the pad, said runner section having a predetermined width adjacent the pad, said terminal pad having a width parallel to the section width that is greater than the section width, said terminal comprising a solder-wettable metal layer adjacent the substrate and an outer plate composed of a solder alloy and having a uniform thickness, and heating the terminal at a temperature effective to melt the solder alloy and to draw the molten solder alloy onto the terminal pad from the adjacent runner section to form a solder bump.

Claim 2

A method for forming a solder bumped terminal on a planar dielectric substrate comprising fabricating a terminal on the substrate, said terminal comprising a terminal pad adapted for receiving a solder bump and a linear runner section connected to the pad, said runner section having a predetermined width adjacent the pad, said terminal pad having a width parallel to the section width that is greater than the section width, said terminal comprising a solder-wettable metal layer adjacent the substrate and an outer plate composed of a solder alloy and having a uniform thickness, and heating the terminal at a temperature effective to melt the solder alloy and to draw the molten solder alloy onto the terminal pad from the adjacent runner section to form a solder bump.

Claim 5

A method for forming an electrical circuit trace having a solder-bumped terminal pad on a planar dielectric substrate, said method comprising fabricating a trace on the substrate, said trace including a dual-plate terminal portion comprising a terminal pad adapted for receiving a solder bump and a linear runner section extending from the pad, said runner section having a predetermined width less than 500 microns, said terminal pad having a width parallel to the runner section width that is at least 1.2 times greater than the runner section width, said terminal portion comprising a copper plate affixed to the substrate and an outer layer composed of tin-lead solder alloy, said copper layer having a uniform thickness, said solder layer having a uniform thickness less than 25 microns, and heating the terminal at a temperature effective to reflow the solder alloy, whereupon molten solder alloy is drawn onto the terminal pad from the adjacent trace section to form a solder bump having a height of at least 40 microns.

Claim 6

A method for forming an electrical circuit trace having a solder-bumped terminal pad on a planar dielectric substrate, said method comprising fabricating a trace on the substrate, said trace including a dual-plate terminal portion comprising a terminal pad adapted for receiving a solder bump and a linear runner section extending from the pad, said runner section having a predetermined width less than 500 microns, said terminal pad having a width parallel to the runner section width that is at least 1.2 times greater than the runner section width, said terminal portion comprising a copper plate affixed to the substrate and an outer layer composed of tin-lead solder alloy, said copper layer having a uniform thickness, said solder layer having a uniform thickness less than 25 microns, and heating the terminal at a temperature effective to reflow the solder alloy, whereupon molten solder alloy is drawn onto the terminal pad from the adjacent trace section to form a solder bump having a height of at least 40 microns.

Claim 14

A method for manufacturing a printed circuit board comprising a copper circuit trace including a plurality of terminals adapted for attachment of an electronic component by solder bump interconnections, each terminal comprising an enlarged terminal pad and an adjacent linear runner section and having a solder bump bonded to the terminal pad, said method comprising applying a metallic copper plate having a uniform thickness onto a dielectric substrate, said plate including the circuit trace and an adjacent region about the trace, apply a removable mask onto the copper plate, said mask covering the adjacent plate region and having an opening exposing the copper plate in a pattern corresponding to the circuit trace including each said terminal, immersing the masked copper plate into an electroplating bath containing dissolved tin and lead ions, and cathodically biasing the plate to codeposit metallic tin and metallic lead onto the exposed copper to form an outer plate of tin-lead solder alloy, whereby said mask prevents deposition onto the adjacent plate region, removing the mask from the copper plate to expose the adjacent region, etching the copper plate to remove the adjacent copper region, whereby the solder plate protects the underlying copper from etching to define the circuit trace including said terminals having said enlarged terminal pads, and heating to reflow the electroplated solder alloy, whereupon solder alloy is drawn onto each terminal pad from the runner section to form a solder bump.

Claim 15

A method for manufacturing a printed circuit board comprising a copper circuit trace including a plurality of terminals adapted for attachment of an electronic component by solder bump interconnections, each terminal comprising an enlarged terminal pad and an adjacent linear runner section and having a solder bump bonded to the terminal pad, said method comprising applying a metallic copper plate having a uniform thickness onto a dielectric substrate, said plate including the circuit trace and an adjacent region about the trace, apply a removable mask onto the copper plate, said mask covering the adjacent plate region and having an opening exposing the copper plate in a pattern corresponding to the circuit trace including each said terminal, immersing the masked copper plate into an electroplating bath containing dissolved tin and lead ions, and cathodically biasing the plate to codeposit metallic tin and metallic lead onto the exposed copper to form an outer plate of tin-lead solder alloy, whereby said mask prevents deposition onto the adjacent plate region, removing the mask from the copper plate to expose the adjacent region, etching the copper plate to remove the adjacent copper region, whereby the solder plate protects the underlying copper from etching to define the circuit trace including said terminals having said enlarged terminal pads, and heating to reflow the electroplated solder alloy, whereupon solder alloy is drawn onto each terminal pad from the runner section to form a solder bump.

Claim 22

A method for manufacturing a printed circuit board comprising a copper circuit trace including a plurality of terminals adapted for attachment of an electronic component by solder bump interconnections, each terminal comprising a circular terminal pad adapted for carrying a solder bump and an adjacent linear runner section, said method comprising affixing a metallic copper plate having a uniform thickness onto a dielectric substrate such that the copper plate includes the trace and an adjacent region about the trace, apply an electrically insulative photoresist mask onto the copper plate to cover the adjacent region, said mask having an opening for exposing the copper plate in a pattern corresponding to the circuit trace and defining each terminal such that the linear runner section has a width of between about 50 and 150 microns and the pad has a diameter between about 1.2 and 2.0 times the runner section width, immersing the masked copper plate into an aqueous electroplating bath containing dissolved tin and lead ions, and cathodically biasing the plate to reduce said ions and codeposit metallic tin and metallic lead selectively onto the exposed copper trace to produce a solder plate thereon, said plate being deposited to a thickness between about 10 and 25 microns and being composed of a solder alloy consisting of between about 35 and 45 weight percent lead and the balance tin, removing the mask to expose the adjacent copper region about the solder-plated trace, immersing the copper plate including the solder-plated trace in an etching solution effective to dissolve copper but not reactable with the solder alloy, whereby copper is etched from the adjacent region and protected at the trace by said solder plate to thereby define the trace, said trace including said terminals and having said solder plate overlying said copper plate, and heating the solder-plated trace to reflow the electroplated solder alloy, whereupon solder alloy is drawn onto each terminal pad from the neighboring runner section to form a solder bump having a height between about 60 and 80 microns. e

Claim 23

A method for manufacturing a printed circuit board comprising a copper circuit trace including a plurality of terminals adapted for attachment of an electronic component by solder bump interconnections, each terminal comprising a circular terminal pad adapted for carrying a solder bump and an adjacent linear runner section, said method comprising affixing a metallic copper plate having a uniform thickness onto a dielectric substrate such that the copper plate includes the trace and an adjacent region about the trace, apply an electrically insulative photoresist mask onto the copper plate to cover the adjacent region, said mask having an opening for exposing the copper plate in a pattern corresponding to the circuit trace and defining each terminal such that the linear runner section has a width of between about 50 and 150 microns and the pad has a diameter between about 1.2 and 2.0 times the runner section width, immersing the masked copper plate into an aqueous electroplating bath containing dissolved tin and lead ions, and cathodically biasing the plate to reduce said ions and codeposit metallic tin and metallic lead selectively onto the exposed copper trace to produce a solder plate thereon, said plate being deposited to a thickness between about 10 and 25 microns and being composed of a solder alloy consisting of between about 35 and 45 weight percent lead and the balance tin, removing the mask to expose the adjacent copper region about the solder-plated trace, immersing the copper plate including the solder-plated trace in an etching solution effective to dissolve copper but not reactable with the solder alloy, whereby copper is etched from the adjacent region and protected at the trace by said solder plate to thereby define the trace, said trace including said terminals and having said solder plate overlying said copper plate, and heating the solder-plated trace to reflow the electroplated solder alloy, whereupon solder alloy is drawn onto each terminal pad from the neighboring runner section to form a solder bump having a height between about 60 and 80 microns. e