Patent US2983444A successfully refreshed from Google Patents.
Patent US3582536A successfully refreshed from Google Patents.
Patent US5179355A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5179355A Expired / Lapsed US ⏱️ 0.0 years remaining

Slew control in current feedback amplifiers

Assignee: Elantec Semiconductor LLC
•
Filing: 1991-11-18
•
Granted: 1993-01-12
•
Expires: 2011-11-18
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A current feedback circuit for controlling the error current in current feedback amplifier includes transistor biasing circuitry which monitors the error current to detect high input signal slew rates and switches on a transistor controlled shunt circuit to divert drive current from the transistors forming the amplifier input, when the error current generated exceeds a threshold value.

Inventors

  • 👤 Barry Harvey

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 07:52
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/30; H03F3/3069; H03F3/3076; H03F1/00; H03F1/32; H03F1/3217

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 341 words
A current feedback amplifier circuit comprising; first and second pairs of complementary transistors, the bases of said first pair of transistors forming the input of said current feedback amplifier, the base of each of said second pair of transistors being connected to the emitter of the complementary transistor of said first pair of transistors, and the emitters of said second pair of transistors being connected to a reference point, for replicating the voltage applied to said amplifier input at said reference point; a pair of current sources each of said current sources being connected to the emitter of one of the transistors of said first pair of transistors, for supplying drive current to said first pair of transistors; a pair of current mirrors, each current mirror having its input connected to the collector of one transistor of said second pair of transistors and having its output connected to the input of a unity gain amplifier, for replicating the current flowing in the collectors of each of said second pair of transistors; a capacitor connected between the input of said unity gain amplifier and a reference potential, for controlling the voltage rate of change at the input of said unity gain amplifier when the collector currents of said second pair of transistors are unequal; a feedback circuit comprising a first impedance connected between the output of said unity gain amplifier and said reference point and a second impedance connected between said reference point and said reference potential, for providing a divided sample of the output voltage of said unity gain amplifier to said reference point; and a pair of current monitoring circuits, each of said current monitoring circuits being connected between the collector of one transistor of said second pair of transistors and the current source driving the corresponding transistor of said first pair of transistors, for detecting the error current flowing in the collectors of said second transistor pair and reducing the drive current to the corresponding transistor of said first transistor pair when said error current reaches a pre-selected level.
Claim 2
Dependent Claim 341 words
A current feedback amplifier circuit comprising; first and second pairs of complementary transistors, the bases of said first pair of transistors forming the input of said current feedback amplifier, the base of each of said second pair of transistors being connected to the emitter of the complementary transistor of said first pair of transistors, and the emitters of said second pair of transistors being connected to a reference point, for replicating the voltage applied to said amplifier input at said reference point; a pair of current sources each of said current sources being connected to the emitter of one of the transistors of said first pair of transistors, for supplying drive current to said first pair of transistors; a pair of current mirrors, each current mirror having its input connected to the collector of one transistor of said second pair of transistors and having its output connected to the input of a unity gain amplifier, for replicating the current flowing in the collectors of each of said second pair of transistors; a capacitor connected between the input of said unity gain amplifier and a reference potential, for controlling the voltage rate of change at the input of said unity gain amplifier when the collector currents of said second pair of transistors are unequal; a feedback circuit comprising a first impedance connected between the output of said unity gain amplifier and said reference point and a second impedance connected between said reference point and said reference potential, for providing a divided sample of the output voltage of said unity gain amplifier to said reference point; and a pair of current monitoring circuits, each of said current monitoring circuits being connected between the collector of one transistor of said second pair of transistors and the current source driving the corresponding transistor of said first pair of transistors, for detecting the error current flowing in the collectors of said second transistor pair and reducing the drive current to the corresponding transistor of said first transistor pair when said error current reaches a pre-selected level.
Claim 3
Dependent Claim 132 words
The circuit of claim 1, wherein each of said current monitoring circuits comprises; a current monitoring transistor including base, collector, and emitter electrodes and having its base electrode connected to the collector electrode of one of said second pair of transistors, its emitter electrode connected through a resistor to the current source which provides drive current to the corresponding transistor of said first pair of transistors, and its collector electrode connected to a voltage supply; and, an error current resistor having one terminal connected to said voltage supply and having a second terminal connected to the base of said current monitoring transistor and to the collector of the corresponding transistor of said second pair of transistors, for biasing said current monitoring transistors into conduction when the error current reaches a pre-selected value.
Claim 4
Dependent Claim 71 words
The circuit of claim 2, wherein each of said current sources comprises; a current source transistor including base, emitter, and collector electrodes and having its emitter electrode connected to a voltage supply through a current source resistor, its collector electrode connected to the emitter electrode of one of said first pair of complementary transistors, and its base electrode connected to a second voltage supply to bias said current source into conduction.

References Cited (Backward Citations)

US4502020A Cited
US4888559A Cited
US4833423A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-01-12 1996-07-13 1997-01-12 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-01-12 2000-07-13 2001-01-12 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-01-12 2004-07-13 2005-01-12 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag