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US5175495A Expired / Lapsed US ⏱️ 0.0 years remaining

Detection of semiconductor failures by photoemission and electron beam testing

Assignee: LSI Corp
•
Filing: 1991-06-25
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Granted: 1992-12-29
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Expires: 2011-06-25
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Abstract

Abstract A technique for pinpointing and analyzing failures in complex integrated circuits is disclosed. A device-under-test (DUT) is powered up. Using Liquid Crystal (LC) or Photo-Emission (PE) techniques, leakage sites are identified. The leakage sites are associated with suspect circuit elements on the DUT, and candidate I/Os associated with the suspect failing elements are selected for subsequent testing. Using the candidate I/Os, a truncated set of test vectors is created, and applied to the DUT. While the DUT is running the truncated set of test vectors, the suspect elements are rigorously probed to identify failing elements. SEM images are preferably viewed simultaneously. In this manner, a log of failing elements is derived, for circuit or process re-design.

Inventors

  • 👤 Upendra Brahme
  • 👤 Sudhakar R. Gouravaram
  • 👤 Ramin Halaviati

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 07:56
CPC Classifications
G; G01; G01R; G01R31/00; G01R31/28; G01R31/302; G01R31/305

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 66 words
A method of testing integrated circuit devices, comprising the sequential steps of: (a) powering-up an integrated circuit device; (b) identifying leakage sites on the powered-up device; (c) associating suspect failing circuit elements with the leakage sites identified in step (b); (d) generating a set of test vectors associated with only the suspect failing circuit elements; and (e) applying the set of test vectors to the device.
Claim 2
Independent Claim 66 words
A method of testing integrated circuit devices, comprising the sequential steps of: (a) powering-up an integrated circuit device; (b) identifying leakage sites on the powered-up device; (c) associating suspect failing circuit elements with the leakage sites identified in step (b); (d) generating a set of test vectors associated with only the suspect failing circuit elements; and (e) applying the set of test vectors to the device.
Claim 3
Dependent Claim 35 words
Method according to claim 1, further comprising: in the step (c), associating candidate I/Os to the suspect failing elements; and in the step (d), generating the set of test vectors base on the candidate I/Os.
Claim 4
Dependent Claim 73 words
Method according to claim 1, further comprising: independent of the steps (a) through (e), generating a comprehensive set of test vectors suitable for exercising all of the I/Os of the device on an ECAD system; and using the ECAD system to generate, based on the results of the steps (a) through (c), the set of test vectors applied in the step (d) as a truncated set of the comprehensive set of test vectors.
Claim 5
Dependent Claim 32 words
Method according to claim 1, further comprising: while applying the set of test vectors to the device (step (e)), measuring the response of individual suspect failing circuit elements with an e-beam prober.
Claim 6
Dependent Claim 30 words
Method according to claim 4, further comprising: while measuring the response of suspect failing circuit elements with an e-beam prober, viewing the suspect failed elements with a scanning electron microscope.
Claim 7
Dependent Claim 34 words
Method according to claim 4, further comprising: viewing the response of suspect failing circuit elements measured by the e-beam prober as live waveforms; and simultaneously viewing simulated waveforms for the suspect failing circuit elements.
Claim 8
Dependent Claim 15 words
Method according to claim 1, wherein: the leakage sites are identified using Liquid Crystal techniques.
Claim 9
Dependent Claim 14 words
Method according to claim 1, wherein: the leakage sites are identified using photo-emission techniques.

References Cited (Backward Citations)

US4169244A Cited
US4335457A Cited
US4875002A Cited
US4761607A Cited
US4812748A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-12-29 1996-06-29 1996-12-29 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-12-29 2000-06-29 2000-12-29 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-12-29 2004-06-29 2004-12-29 $7700.00 Window Closed / Lapsed

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