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US5172334A
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Circuit arrangement for defining the positions of extrema of a correlation function
Assignee: US Philips Corp
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Filing: 1991-03-19
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Granted: 1992-12-15
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Expires: 2011-03-19
Abstract
Abstract A circuit arrangement for defining the positions of extrema of a correlation function includes a memory (1), an address control unit (3) and a correlator (2). The elaborate computations for defining correlation functions can be reduced by the circuit arrangement described. The correlation function is an example. Two functions are present in digital form. Their sampling values are stored in the addressable memory (1). The address control unit (3) generates addresses by which the functions stored in the memory (1) are read in a sub-sampled manner. With these sub-sampled functions the extrema and their positions are defined in a first step by the correlator (2) and the address control unit (3). Proximate to an extremum thus defined the variation of the correlation functions is examined more precisely in this proximity in a smaller sub-sampling ratio and the extremum in this proximity is redefined. This process can be repeated with an increasingly smaller sub-sampling ratio.
Inventors
- 👤 Klaus Hienerwadel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 23:29
CPC Classifications
G; G06; G06F; G06F17/00; G06F17/10; G06F17/15
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
278 words
A circuit arrangement for defining the positions of extrema of a correlation function of two signals which are present in a digital form, in order to determine a correlation between said signals, which comprises: an addressable memory having an input and an output, in which the values of the signals are stored at predetermined locations in memory addresses; an address control unit having an input and an output coupled to the input of said addressable memory for controlling the writing and reading processes of said addressable memory; a correlator having an input and an output, the output of said addressable memory being coupled to said correlator input and said correlator output being coupled to the input of said address control unit; means by which the values of the correlation function computed by the correlator and their associated locations are stored, and means by which the extrema of the correlation function computed by the correlator are obtained by way of comparison; the address control unit generating addresses by which the signals sub-sampled in a ratio of 1:n1 are applied to the correlator, the positions of the extrema defined by means of these sub-sampled signals being stored, the address control unit generating addresses by which the signals sub-sampled in a ratio of 1:n2, with the value of the number n2 being smaller than the number n1, are applied to the correlator and which are required only for determining the variation of the correlation functions of a predetermined proximity of the previously determined extrema positions, and in the extrema positions of the correlation function in the predetermined proximity being redefined by means of the signals sub-sampled in a ratio of 1:n2.
Claim 2
Dependent Claim
278 words
A circuit arrangement for defining the positions of extrema of a correlation function of two signals which are present in a digital form, in order to determine a correlation between said signals, which comprises: an addressable memory having an input and an output, in which the values of the signals are stored at predetermined locations in memory addresses; an address control unit having an input and an output coupled to the input of said addressable memory for controlling the writing and reading processes of said addressable memory; a correlator having an input and an output, the output of said addressable memory being coupled to said correlator input and said correlator output being coupled to the input of said address control unit; means by which the values of the correlation function computed by the correlator and their associated locations are stored, and means by which the extrema of the correlation function computed by the correlator are obtained by way of comparison; the address control unit generating addresses by which the signals sub-sampled in a ratio of 1:n1 are applied to the correlator, the positions of the extrema defined by means of these sub-sampled signals being stored, the address control unit generating addresses by which the signals sub-sampled in a ratio of 1:n2, with the value of the number n2 being smaller than the number n1, are applied to the correlator and which are required only for determining the variation of the correlation functions of a predetermined proximity of the previously determined extrema positions, and in the extrema positions of the correlation function in the predetermined proximity being redefined by means of the signals sub-sampled in a ratio of 1:n2.
Claim 3
Dependent Claim
25 words
A circuit arrangement as claimed in claim 1, characterized in that the address control unit repeats the indicated steps in an increasingly smaller sub-sampling ratio.
References Cited (Backward Citations)
US4430722A
Cited
US4757464A
Cited
US4972441A
Cited
US4819197A
Cited
US5020113A
Cited
US5046179A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-12-15 | 1996-06-15 | 1996-12-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-12-15 | 2000-06-15 | 2000-12-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-12-15 | 2004-06-15 | 2004-12-15 | $7700.00 | Window Closed / Lapsed |