US5169803A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of filling contact holes of a semiconductor device
Assignee: NEC Corp
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Filing: 1991-11-27
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Granted: 1992-12-08
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Expires: 2011-11-27
Abstract
Abstract In this semiconductor device, contact holes extending from a lower interconnection layer containing diffusion layers at the surface of a Si substrate to an Al-involved interconnection layer formed above the Si substrate through the intermediation of an interlayer dielectric film are filled with Al alloy having an eutectic point lower than that of Al-Si alloy. Then, for example, an Al-Ge alloy is sputtered, reflowed and allowed to react with the Si film to convert into an Al-Ge-Si alloy. At the stage of forming the Al-Ge-Si alloy, the reflow ceases. This brings the reduction of junction leakage current from the diffusion layers. Similarly in the case of a high aspect ratio of contact hole, this technique enables to fully fill the contact hole with the above-mentioned Al alloy. Besides this technique enables direct interconnections in multilayer Al-involved interconnection structure of between an upper-layer Al-involved interconnection and diffusion layers, contributing to reduction of area required for interconnections.
Inventors
- 👤 Kuniko Miyakawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 10:51
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10W20/40; H10W20/41; H10W20/44; H10W20/4403; H10W20/4405; H10W20/4407
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
282 words
A process of fabricating a semiconductor device comprising: step of forming a lower interconnection layer containing at least diffusion layers provided at the surface of a Si substrate; step of in sequence forming an interlayer dielectric film over the whole surface, forming a photoresist film over the whole surface, and etching back to substantially planarize the top face of said interlayer dielectric film; step of forming contact holes extending to said lower interconnection layer in said interlayer dielectric film; step of forming a Si film over the whole surfaces including the side faces of said interlayer dielectric film exposed as the result of said formation of contact holes and the top faces of said lower interconnection layer exposed as the result of said formation of contact holes; step of sputtering a first Al alloy containing at least Ge on the surface of said Si film, said first Al alloy spreading on the surface of said Si film to form the first Al alloy film covering thereover, and forming a second Al alloy film containing at least Ge and Si on the whole surface including the insides of said contact holes by the alloying reaction between said first Al alloy film and said Si film; and step of etching to leave said second Al alloy film in the insides of said contact holes and to form an Al-involved interconnection layer of said second Al alloy film, or after leaving said second Al alloy film only in the insides or said contact holes, forming a third Al alloy film having an eutectic point higher than that of said second Al alloy film to form an Al-involved interconnection layer of said third Al alloy film.
Claim 2
Dependent Claim
282 words
A process of fabricating a semiconductor device comprising: step of forming a lower interconnection layer containing at least diffusion layers provided at the surface of a Si substrate; step of in sequence forming an interlayer dielectric film over the whole surface, forming a photoresist film over the whole surface, and etching back to substantially planarize the top face of said interlayer dielectric film; step of forming contact holes extending to said lower interconnection layer in said interlayer dielectric film; step of forming a Si film over the whole surfaces including the side faces of said interlayer dielectric film exposed as the result of said formation of contact holes and the top faces of said lower interconnection layer exposed as the result of said formation of contact holes; step of sputtering a first Al alloy containing at least Ge on the surface of said Si film, said first Al alloy spreading on the surface of said Si film to form the first Al alloy film covering thereover, and forming a second Al alloy film containing at least Ge and Si on the whole surface including the insides of said contact holes by the alloying reaction between said first Al alloy film and said Si film; and step of etching to leave said second Al alloy film in the insides of said contact holes and to form an Al-involved interconnection layer of said second Al alloy film, or after leaving said second Al alloy film only in the insides or said contact holes, forming a third Al alloy film having an eutectic point higher than that of said second Al alloy film to form an Al-involved interconnection layer of said third Al alloy film.
Claim 3
Dependent Claim
693 words
A process of fabricating a semiconductor device comprising: step of forming a lower interconnection layer containing at least diffusion layers provided at the surface of a Si substrate; step of in sequence forming an interlayer dielectric film over the whole surface, forming a photoresist film over the whole surface, and etching back to substantially planarize the top face of said interlayer dielectric film; step of forming contact holes extending to said lower interconnection layer in said interlayer dielectric film; step of forming Si film over the whole surfaces including the side faces of said interlayer dielectric film exposed as the result of said formation of contact holes and the top faces of said lower interconnection layer exposed as the result of said formation of contact holes; step of forming a Si film over the whole surfaces including the side faces of said interlayer dielectric film exposed as the result of said formation of contact holes and the top faces of said lower interconnection layer exposed as the result of said formation of contact holes; step of sputtering a first Al alloy containing at least Ge on the surface of said Si film, said first Al alloy spreading on the surface of said Si film to form the first Al alloy film covering thereover, and forming a second Al alloy film containing at least Ge and Si on the whole surface including the insides of said contact holes by the alloying reaction between said first Al alloy film and said Si film; and step of etching to leave said second Al alloy film in the insides of said contact holes and to form an Al-involved interconnection layer of said second Al alloy film, or after leaving said second Al alloy film only in the insides of said contact holes, forming a third Al alloy film having an eutectic point higher than that of said second Al alloy film to form an Al-involved interconnection layer of said third Al alloy film step of sputtering a first Al alloy containing at least Ge on the surface of said Si film, said first Al alloy spreading on the surface of said Si film to form the first Al alloy film covering thereover, and forming a second Al alloy film containing at least Ge and Si on the whole surface including the insides of said contact holes by the alloying reaction between said first Al alloy film and said Si film; step of etching to leave said second Al alloy film in the insides of said contact holes and to form an Al-involved interconnection layer of said second Al alloy film, or after leaving said second Al alloy film only in the insides of said contact holes, forming a third Al alloy film having an eutectic point higher than that of said second Al alloy film to form an Al-involved interconnection layer of siad third Al alloy film; step of forming an additional interlayer dielectric film and substantially planarizing the top face of said additional interlayer dielectric film; step of cutting additional contact holes of different types to said lower interconnection layer and said Al-involved interconnection layer in said interlayer dielectric film and said additional interlayer dielectric film; step of forming an additional Si film over the whole surfaces including the side faces of said interlayer dielectric film, the side faces of said additional interlayer dielectric film exposed as the result of formation of said additional contact holes, and the top faces of said lower interconnection layer and the top faces of said Al-involved interconnection layer exposed as the result of said formation of contact holes; step of forming an additional second Al alloy film over the whole surface; and step of etching to leave said additional second Al alloy film in the insides of said additional contact holes and to form an further-upper Al-involved interconnection layer of said additional second Al alloy film, or after leaving said additional second Al alloy film only in the insides of said additional contact holes, forming an additional third Al alloy film on the whole surface, and etching to form an Al-involved interconnection layer of said additional third Al alloy film.
Claim 4
Dependent Claim
693 words
A process of fabricating a semiconductor device comprising: step of forming a lower interconnection layer containing at least diffusion layers provided at the surface of a Si substrate; step of in sequence forming an interlayer dielectric film over the whole surface, forming a photoresist film over the whole surface, and etching back to substantially planarize the top face of said interlayer dielectric film; step of forming contact holes extending to said lower interconnection layer in said interlayer dielectric film; step of forming Si film over the whole surfaces including the side faces of said interlayer dielectric film exposed as the result of said formation of contact holes and the top faces of said lower interconnection layer exposed as the result of said formation of contact holes; step of forming a Si film over the whole surfaces including the side faces of said interlayer dielectric film exposed as the result of said formation of contact holes and the top faces of said lower interconnection layer exposed as the result of said formation of contact holes; step of sputtering a first Al alloy containing at least Ge on the surface of said Si film, said first Al alloy spreading on the surface of said Si film to form the first Al alloy film covering thereover, and forming a second Al alloy film containing at least Ge and Si on the whole surface including the insides of said contact holes by the alloying reaction between said first Al alloy film and said Si film; and step of etching to leave said second Al alloy film in the insides of said contact holes and to form an Al-involved interconnection layer of said second Al alloy film, or after leaving said second Al alloy film only in the insides of said contact holes, forming a third Al alloy film having an eutectic point higher than that of said second Al alloy film to form an Al-involved interconnection layer of said third Al alloy film step of sputtering a first Al alloy containing at least Ge on the surface of said Si film, said first Al alloy spreading on the surface of said Si film to form the first Al alloy film covering thereover, and forming a second Al alloy film containing at least Ge and Si on the whole surface including the insides of said contact holes by the alloying reaction between said first Al alloy film and said Si film; step of etching to leave said second Al alloy film in the insides of said contact holes and to form an Al-involved interconnection layer of said second Al alloy film, or after leaving said second Al alloy film only in the insides of said contact holes, forming a third Al alloy film having an eutectic point higher than that of said second Al alloy film to form an Al-involved interconnection layer of siad third Al alloy film; step of forming an additional interlayer dielectric film and substantially planarizing the top face of said additional interlayer dielectric film; step of cutting additional contact holes of different types to said lower interconnection layer and said Al-involved interconnection layer in said interlayer dielectric film and said additional interlayer dielectric film; step of forming an additional Si film over the whole surfaces including the side faces of said interlayer dielectric film, the side faces of said additional interlayer dielectric film exposed as the result of formation of said additional contact holes, and the top faces of said lower interconnection layer and the top faces of said Al-involved interconnection layer exposed as the result of said formation of contact holes; step of forming an additional second Al alloy film over the whole surface; and step of etching to leave said additional second Al alloy film in the insides of said additional contact holes and to form an further-upper Al-involved interconnection layer of said additional second Al alloy film, or after leaving said additional second Al alloy film only in the insides of said additional contact holes, forming an additional third Al alloy film on the whole surface, and etching to form an Al-involved interconnection layer of said additional third Al alloy film.
Claim 5
Dependent Claim
36 words
A process of fabricating a semiconductor device according to claim 2 further comprising the step of: before the formation of the interlayer dielectric film, forming a silicide layer on the top faces of said diffusion layers.
Claim 6
Dependent Claim
237 words
A process of fabricating a semiconductor device comprising: step of forming a lower interconnection layer containing at least diffusion layers provided at the surface of a Si substrate; step of forming an interlayer dielectric film over the whole surface; step of forming contact holes extending to said lower interconnection layer in said interlayer dielectric film; step of forming Si film over the whole surfaces including the side faces of said interlayer dielectric film exposed as the result of said formation of contact holes and the top faces of said lower interconnection layer exposed as the result of said formation of contact holes; step of sputtering a first Al alloy containing at least Ge on the surface of said Si film, said first Al alloy spreading on the surface of said Si film to form the first Al alloy film covering thereover, and forming a second Al alloy film containing at least Ge and Si on the whole surface including the insides of said contact holes by the alloying reaction between said first Al alloy film and said Si film; and step of etching to leave said second Al alloy film only in the insides of said contact holes; and step of forming over the whole surface a third Al alloy film having an eutectic point higher than that of said second Al alloy film and patterning said third Al alloy film to form an Al-involved interconnection layer.
Claim 7
Dependent Claim
237 words
A process of fabricating a semiconductor device comprising: step of forming a lower interconnection layer containing at least diffusion layers provided at the surface of a Si substrate; step of forming an interlayer dielectric film over the whole surface; step of forming contact holes extending to said lower interconnection layer in said interlayer dielectric film; step of forming Si film over the whole surfaces including the side faces of said interlayer dielectric film exposed as the result of said formation of contact holes and the top faces of said lower interconnection layer exposed as the result of said formation of contact holes; step of sputtering a first Al alloy containing at least Ge on the surface of said Si film, said first Al alloy spreading on the surface of said Si film to form the first Al alloy film covering thereover, and forming a second Al alloy film containing at least Ge and Si on the whole surface including the insides of said contact holes by the alloying reaction between said first Al alloy film and said Si film; and step of etching to leave said second Al alloy film only in the insides of said contact holes; and step of forming over the whole surface a third Al alloy film having an eutectic point higher than that of said second Al alloy film and patterning said third Al alloy film to form an Al-involved interconnection layer.
Claim 8
Dependent Claim
36 words
A process of fabricating a semiconductor device according to claim 4 further comprising the step of: before the formation of the interlayer dielectric film, forming a silicide layer on the top faces of said diffusion layers.
Claim 9
Dependent Claim
411 words
A process of fabricating a semiconductor device comprising: step of forming a lower interconnection layer containing at least diffusion layers provided at the surface of a Si substrate; step of forming an interlayer dielectric film over the whole surface; step of forming contact holes extending to said lower interconnection layer in said interlayer dielectric film; step of forming Si film over the whole surfaces including the side faces of said interlayer dielectric film exposed as the result of said formation of contact holes and the top faces of said lower interconnection layer exposed as the result of said formation of contact holes; step of sputtering a first Al alloy containing at least Ge on the surface of said Si film, said first Al alloy spreading on the surface of said Si film to form the first Al alloy film covering thereover, and forming a second Al alloy film containing at least Ge and Si on the whole surface including the insides of said contact holes by the alloying reaction between said first Al alloy film and said Si film; step of etching to leave said second Al alloy film only in the insides of said contact holes; and step of forming over the whole surface a third Al alloy film having an eutectic point higher than that of said second Al alloy film and patterning said third Al alloy film to form an Al-involved interconnection layer; step of forming an additional interlayer dielectric film and substantially planarizing the top face of said additional interlayer dielectric film; step of cutting additional contact holes of different types of said lower interconnection layer and said Al-involved interconnection layer in said interlayer dielectric film and said additional interlayer dielectric film; step of forming an additional Si film over the whole surfaces including the side faces of said interlayer dielectric film, the side faces of said additional interlayer dielectric film exposed as the result of formation of said additional contact holes, and the top faces of said lower interconnection layer and the top faces of said Al-involved interconnection layer exposed as the result of said formation of contact holes; step of forming an additional second Al alloy film over the whole surface; and step of, after leaving said additional second Al alloy film only in the insides of said additional contact holes, forming an additional third Al alloy film on the whole surface, and forming an Al-involved interconnection layer of said additional third Al alloy film.
Claim 10
Dependent Claim
411 words
A process of fabricating a semiconductor device comprising: step of forming a lower interconnection layer containing at least diffusion layers provided at the surface of a Si substrate; step of forming an interlayer dielectric film over the whole surface; step of forming contact holes extending to said lower interconnection layer in said interlayer dielectric film; step of forming Si film over the whole surfaces including the side faces of said interlayer dielectric film exposed as the result of said formation of contact holes and the top faces of said lower interconnection layer exposed as the result of said formation of contact holes; step of sputtering a first Al alloy containing at least Ge on the surface of said Si film, said first Al alloy spreading on the surface of said Si film to form the first Al alloy film covering thereover, and forming a second Al alloy film containing at least Ge and Si on the whole surface including the insides of said contact holes by the alloying reaction between said first Al alloy film and said Si film; step of etching to leave said second Al alloy film only in the insides of said contact holes; and step of forming over the whole surface a third Al alloy film having an eutectic point higher than that of said second Al alloy film and patterning said third Al alloy film to form an Al-involved interconnection layer; step of forming an additional interlayer dielectric film and substantially planarizing the top face of said additional interlayer dielectric film; step of cutting additional contact holes of different types of said lower interconnection layer and said Al-involved interconnection layer in said interlayer dielectric film and said additional interlayer dielectric film; step of forming an additional Si film over the whole surfaces including the side faces of said interlayer dielectric film, the side faces of said additional interlayer dielectric film exposed as the result of formation of said additional contact holes, and the top faces of said lower interconnection layer and the top faces of said Al-involved interconnection layer exposed as the result of said formation of contact holes; step of forming an additional second Al alloy film over the whole surface; and step of, after leaving said additional second Al alloy film only in the insides of said additional contact holes, forming an additional third Al alloy film on the whole surface, and forming an Al-involved interconnection layer of said additional third Al alloy film.
Claim 11
Dependent Claim
36 words
A process of fabricating a semiconductor device according to claim 6 further comprising the step of: before the formation of the interlayer dielectric film, forming a silicide layer on the top faces of said diffusion layers.
Claim 12
Dependent Claim
34 words
A process of fabricating a semiconductor device according to claims 1 or 4 further comprising the step of; before the formation of said Si film, forming a conducting barrier film over the whole surface.
Claim 13
Dependent Claim
36 words
A process of fabricating a semiconductor device according to claim 8 further comprising the step of: before the formation of the interlayer dielectric film, forming a silicide layer on the top faces of said diffusion layers.
Claim 14
Dependent Claim
52 words
A process of fabricating a semiconductor device according to claims 2 or 6 further comprising the steps of: before the formation of said Si film, forming a conducting barrier film over the whole surface; and before the formation of said Si film, forming an additional conducting barrier film over the whole surface.
Claim 15
Dependent Claim
36 words
A process of fabricating a semiconductor device according to claim 10 further comprising the step of: before the formation of the interlayer dielectric film, forming a silicide layer on the top faces of said diffusion layers.
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