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Solid-state hybrid infrared imaging device

Assignee: Mitsubishi Electric Corp
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Filing: 1992-05-18
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Granted: 1992-12-01
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Expires: 2012-05-18
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Abstract

Abstract A solid-state imaging device includes a photodiode array having a plurality of pixels, each pixel including a second conductivity type region formed in a first conductivity type semiconductor layer, an electrode common to all the pixels and disposed on the first conductivity type semiconductor layer, a signal transfer part for transferring signal charges generated in the pixels and a DC voltage source for applying a DC voltage in a forward direction to the pixels. The reverse bias voltage applied to a photodiode due to the voltage applied by the signal input stage of the signal transfer part is canceled by the forward DC voltage applied to the common electrode. As a result, the operating points of the pixels are uniform when nearly zero bias voltage is applied to the pixels.

Inventors

  • 👤 Norimasa Kumada
  • 👤 Yoshihiro Hisa
  • 👤 Yasuaki Yoshida

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 12:19
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/18; H10F39/184; H10F39/1843

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 101 words
A solid-state imaging device comprising: a photodiode array having a plurality of pixels comprising a plurality of second conductivity type regions in a first conductivity type semiconductor layer, thereby forming a plurality of pn junctions, and an electrode common to all of said pixels and disposed on said first conductivity type semiconductor layer; a signal transfer means for transferring signal charges generated in said pixels in response to incident light, said signal transfer means being connected to said second conductivity type regions; and DC voltage applying means for applying a DC voltage in a forward direction to said plurality of junctions.
Claim 2
Dependent Claim 101 words
A solid-state imaging device comprising: a photodiode array having a plurality of pixels comprising a plurality of second conductivity type regions in a first conductivity type semiconductor layer, thereby forming a plurality of pn junctions, and an electrode common to all of said pixels and disposed on said first conductivity type semiconductor layer; a signal transfer means for transferring signal charges generated in said pixels in response to incident light, said signal transfer means being connected to said second conductivity type regions; and DC voltage applying means for applying a DC voltage in a forward direction to said plurality of junctions.
Claim 3
Dependent Claim 80 words
A solid-state imaging device in accordance with claim 1 including first and second substrates, connecting bumps, and a signal input stage as part of said signal transfer means for receiving signal charges produced by said pixels in response to incident light wherein said photodiode array and said signal transfer means are formed on said first and second substrates, respectively, and each pixel has a second electrode connected to said signal input stage of said signal transfer means via said bumps.
Claim 4
Dependent Claim 29 words
A solid-state imaging device in accordance with claim 2 wherein said DC voltage applying means is a DC power source connected to said common electrode and said second substrate.
Claim 5
Dependent Claim 34 words
A solid-state imaging device in accordance with claim 3 wherein a reverse bias voltage applied to a pixel through said signal input stage is canceled by the voltage applied by said DC power source.
Claim 6
Dependent Claim 18 words
A solid-state imaging device in accordance with claim 3 wherein said DC power source supplies a variable voltage.
Claim 7
Dependent Claim 31 words
A solid-state imaging device in accordance with claim 1 wherein said first conductivity type semiconductor layer comprises cadmium mercury telluride and said signal transfer means comprises a silicon semiconductor device structure.

References Cited (Backward Citations)

US3808435A Cited
US4614960A Cited
JPS6261357A Cited
US4994876A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-12-01 1996-06-01 1996-12-01 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-12-01 2000-06-01 2000-12-01 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-12-01 2004-06-01 2004-12-01 $7700.00 Window Closed / Lapsed

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