US5168175A
Expired / Lapsed
US
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Semiconductor integrated circuit using junction field effect transistor as current control element
Assignee: Toshiba Corp
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Filing: 1991-02-13
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Granted: 1992-12-01
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Expires: 2011-02-13
Abstract
Abstract A semiconductor integrated circuit for obtaining constant voltage characteristics or a current switching function by controlling an output current using a current control element has a DC input terminal, a common input/output terminal, and an output terminal. A junction field effect transistor (JFET) is used as a current control element. The first main electrode (drain) and second main electrode (source) of the JFET are connected to the DC current input terminal and the output terminal, respectively. A DC power is input between the DC input terminal and the common input/output terminal. A power between the output terminal and the common input/output terminal is applied to a load. A maximum current of the JFET is limited to a drain maximum saturation current and a current having a value larger that of the maximum saturation current is not basically supplied to the JFET.
Inventors
- 👤 Koichi Endo
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 22:22
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/56; G05F1/565; G05F1/569; G05F1/573; H; H03; H03K; H03K17/00; H03K17/08; H03K17/081; H03K17/08104; H03K17/51; H03K17/56; H03K17/687; H10; H10D; H10D89/00; H10D89/60; H10D89/601
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
139 words
A semiconductor integrated circuit comprising: DC input terminal means for receiving DC power; common input/output terminal means for receiving DC power and for supplying power to a load; output terminal means for supplying power to said load; a junction field effect transistor having a first main electrode connected to said DC input terminal means and a second means electrode connected to said output terminal means; output voltage sensing means for sensing at least a portion of a voltage between said output terminal means and said common input/output terminal means to provide a sensed output voltage; reference voltage generating means for generating a reference voltage; and error amplifying means for comparing said sensed output voltage and said reference voltage and for generating a control signal controlling ON/OFF operation of said junction field effect transistor on the basis of the comparison.
Claim 2
Dependent Claim
139 words
A semiconductor integrated circuit comprising: DC input terminal means for receiving DC power; common input/output terminal means for receiving DC power and for supplying power to a load; output terminal means for supplying power to said load; a junction field effect transistor having a first main electrode connected to said DC input terminal means and a second means electrode connected to said output terminal means; output voltage sensing means for sensing at least a portion of a voltage between said output terminal means and said common input/output terminal means to provide a sensed output voltage; reference voltage generating means for generating a reference voltage; and error amplifying means for comparing said sensed output voltage and said reference voltage and for generating a control signal controlling ON/OFF operation of said junction field effect transistor on the basis of the comparison.
Claim 3
Dependent Claim
18 words
A circuit according to claim 1, wherein said common input/output terminal means is connected to a ground potential.
Claim 4
Dependent Claim
36 words
A circuit according to claim 1, wherein said output voltage sensing means includes dividing means for dividing said voltage between said output terminal means and said common input/output terminal means to provide said sensed output voltage.
Claim 5
Dependent Claim
48 words
A circuit according to claim 3, wherein said dividing means includes first and second load elements connected in series between said output terminal means and said common input/output terminal means, said load elements providing said sensed output voltage at a terminal connecting said first and second load elements.
Claim 6
Dependent Claim
20 words
A circuit according to claim 4, wherein each of said first and second load elements includes at least one resistor.
Claim 7
Dependent Claim
15 words
A circuit according to claim 1, wherein said error amplifying means includes an error amplifier.
Claim 8
Dependent Claim
354 words
A semiconductor integrated circuit comprising: DC input terminal means for receiving DC power; first output terminal means for supplying power to a first load; second output terminal means for supplying power to a second load; common input/output terminal means for receiving DC power and for supplying power to said first and second loads; a semiconductor current control element having a first electrode and a second electrode, said first electrode being connected to said DC input terminal means; a first junction field effect transistor having a first electrode connected to said second electrode of said semiconductor current control element and a second electrode connected to said first output terminal means; a second junction field effect transistor having a first electrode connected to said second electrode of said semiconductor current control element and a second electrode connected to said second output terminal means; first output voltage sensing means for sensing at least a portion of a voltage between said first output terminal means and said common input/output terminal means to provide a first sensed output voltage; second output voltage sensing means for sensing at least a portion of a voltage between said second output terminal means and said common input/output terminal means to provide a second sensed output voltage; reference voltage generating means for generating a reference voltage; first error amplifying means for comparing said first sensed output voltage to said reference voltage and for generating a first control signal controlling ON/OFF operation of said first junction field effect transistor on the basis of the comparison of said first sensed output voltage and said reference voltage; second error amplifying means for comparing said second sensed output voltage to said reference voltage and for generating a second control signal controlling ON/OFF operation of said second junction field effect transistor on the basis of the comparison of said second sensed output voltage and said reference voltage; and third error amplifying means for comparing said first and second control signals and for generating a third control signal controlling ON/OFF operation of said semiconductor current control element on the basis of said comparison of said first and second control signals.
Claim 9
Dependent Claim
354 words
A semiconductor integrated circuit comprising: DC input terminal means for receiving DC power; first output terminal means for supplying power to a first load; second output terminal means for supplying power to a second load; common input/output terminal means for receiving DC power and for supplying power to said first and second loads; a semiconductor current control element having a first electrode and a second electrode, said first electrode being connected to said DC input terminal means; a first junction field effect transistor having a first electrode connected to said second electrode of said semiconductor current control element and a second electrode connected to said first output terminal means; a second junction field effect transistor having a first electrode connected to said second electrode of said semiconductor current control element and a second electrode connected to said second output terminal means; first output voltage sensing means for sensing at least a portion of a voltage between said first output terminal means and said common input/output terminal means to provide a first sensed output voltage; second output voltage sensing means for sensing at least a portion of a voltage between said second output terminal means and said common input/output terminal means to provide a second sensed output voltage; reference voltage generating means for generating a reference voltage; first error amplifying means for comparing said first sensed output voltage to said reference voltage and for generating a first control signal controlling ON/OFF operation of said first junction field effect transistor on the basis of the comparison of said first sensed output voltage and said reference voltage; second error amplifying means for comparing said second sensed output voltage to said reference voltage and for generating a second control signal controlling ON/OFF operation of said second junction field effect transistor on the basis of the comparison of said second sensed output voltage and said reference voltage; and third error amplifying means for comparing said first and second control signals and for generating a third control signal controlling ON/OFF operation of said semiconductor current control element on the basis of said comparison of said first and second control signals.
Claim 10
Dependent Claim
16 words
A circuit according to claim 7, wherein said semiconductor current control element is a bipolar transistor.
Claim 11
Dependent Claim
18 words
A circuit according to claim 7, wherein said semiconductor current control element is a junction field effect transistor.
Claim 12
Dependent Claim
18 words
A circuit according to claim 7, wherein said common input/output terminal means is connected to a ground potential.
Claim 13
Dependent Claim
74 words
A circuit according to claim 7, wherein: said first output voltage sensing means includes first dividing means for dividing said voltage between said first output terminal means and said common input/output terminal means to provide said first sensed output voltage, and said second output voltage sensing means includes second dividing means for dividing said voltage between said second output terminal means and said common input/output terminal means to provide said second sensed output voltage.
Claim 14
Dependent Claim
54 words
A circuit according to claim 11, wherein each of said first and second dividing means includes first and second load elements connected in series between the respective output terminal means and said common input/output terminal means, said load elements providing said sensed output voltage at a terminal connecting said first and second load elements.
Claim 15
Dependent Claim
20 words
A circuit according to claim 12, wherein each of said first and second load elements includes at least one resistor.
Claim 16
Dependent Claim
17 words
A circuit according to claim 7, wherein each of said error amplifying means includes an error amplifier.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-12-01 | 1996-06-01 | 1996-12-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-12-01 | 2000-06-01 | 2000-12-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-12-01 | 2004-06-01 | 2004-12-01 | $7700.00 | Window Closed / Lapsed |