Large size display apparatus for high definition television

Claim 1

A display apparatus made up of a plurality of display units of a conventional television (TV) system for displaying a video signal of a high definition television (HDTV) system, comprising: means for generating a clock having a first frequency, said first frequency being produced by multiplying a horizontal synchronizing signal of said high definition television system by n (an integer), said n being the sum of 2's integral power; an analog-to-digital converter (ADC) for converting an HDTV video signal into a digital video signal by sampling said HDTV video signal at said first frequency: write address generating means for generating, on the basis of said first frequency, a write address in synchronism with said HDTV video signal; a video memory for storing the digital video signal from said ADC in response to said write address; read address generating means for generating a read address for said video memory on the basis of a frequency divided signal of said first frequency, said read address being such that a plurality of digital video signals associated with said plurality of display units are read out in parallel out of said video memory; and a digital-to-analog converter (DAC) for converting the plurality of digital video signals read out in parallel out of said video memory into analog signals and feeding said analog signals to said plurality of display units.