Direct frequency synthesizer

Claim 2

A direct frequency synthesizer comprising: means for generating a set of fixed frequency signals from F L to F H which define a frequency band B, the successive signals in said fixed frequency signal set being spaced from each other by a frequency increment D; means for dividing said fixed frequency signals by a divisor N; first filter means for passing said fixed frequency signals and rejecting undesired signals after division by said divider means and for rejecting undesired signals outside said band B; means for generating a set of selectable LO frequency signals from f 1 to (f 1 +jθ) with the successive signals in said selectable LO frequency signal set being spaced from each other by a frequency increment θ; means for mixing sad fixed frequency signals from the output of said first filter means and said selectable LO frequency signals to generate mixer product signals; first means for selectively coupling one of said fixed frequency signals and one of said selectable LO frequency signals to said mixing means for each selected synthesizer output frequency signal; output filter means coupled to the output of said mixing means and including a plurality of interconnected output filters for rejecting undesired signals and an output where the selected synthesizer output frequency is generated within a synthesizer output frequency band F 1 through F i ; second means for selectively coupling the output of said mixing means through one or more of said output filters to said filter output in accordance with the selected output frequency; and said frequency signals F H and F L being valued to provide continuous output frequency coverage in accordance with a first predetermined relationship among the parameters N, n, and θ where n is equal to an integer one less than the number of LO frequencies in the frequency span associated with the touching of the highest edge of a mixing means sum band and the lowest edge of a mixing means difference band.

Claim 3

The direct frequency synthesizer of claim 1 wherein continuous output frequency coverage is provided in accordance with a half overlap frequency pattern defined by equations F L =Nθ(n-1)/2 and F H =nNθ/2.

Claim 4

The direct frequency synthesizer of claim 1 wherein continuous output frequency coverage is provided in accordance with a full overlap frequency pattern defined by equations F L =Nθ(n-2)/2 and F H =nNθ/2.

Claim 5

The direct frequency synthesizer of claim 1 wherein said output frequency band equals said input frequency band B to characterize said synthesizer with stage cascadability, said parameters N, n, and θ having a second predetermined relationship so that F L =F 1 and F H =F i .

Claim 6

The direct frequency synthesizer of claim 2 wherein said output frequency band equals said input frequency band B to characterize said half overlap synthesizer with stage cascadability in accordance with an equation ##EQU12## where r is an integer.

Claim 7

The direct frequency synthesizer of claim 3 wherein said output frequency band equals said input frequency band B to characterize said full overlap synthesizer with stage cascadability in accordance with an equation ##EQU13## where p is an integer.

Claim 8

A direct frequency synthesizer comprising: A.) means for generating a set of fixed input frequency signals from F L to F H which define a frequency band B, the successive signals in said fixed frequency signal set being spaced from each other by a frequency increment D; and B.) a plurality (x) of cascaded stages, each of said stages having a. means for dividing said fixed input frequency signals by a divisor N; b. first filter means for passing said fixed input frequency signals and rejecting undesired signals after division by said divider means and for rejecting undesired signals outside said band B; c. means for generating a set of selectable LO frequency signals from f 1 to (f 1 +jθ) with the successive signals in said selectable LO frequency signal set being spaced from each other by a frequency increment θ; d. means for mixing said input frequency signals after filtered by said first filtered means and said selectable LO frequency signals to generate mixer product signals; e. first means for selectively coupling one of said input frequency signals and one of said selectable LO frequency signals to said mixing means for each selected synthesizer output frequency signal; f. output filter means coupled to the output of said mixing means for rejecting undesired signals and having a stage output; and C.) said generating means being coupled to the input of said dividing means of the first stage to apply said fixed frequency signals as said input frequency signals; D.) said stage output of each of said stages except the x stage being coupled to transmit input frequency signals to said dividing means of the next stage; E.) said output filter means for said x stage having a plurality of interconnected output filters for rejecting undesired signals and an output where the selected synthesizer output frequency is generated within a synthesizer output frequency band F 1 through F i ; F.) second means for selectively coupling the output of said mixing means of said x stage through one or more of said x stage output filters to said x stage filter output in accordance with the selected output frequency; G.) said frequency signals F H and F L being valued to provide continuous output frequency coverage in accordance with a first predetermined relationship among the parameters N, n, and θ where n is equal to an integer one less than the number of LO frequencies in the frequency span associated with the touching of the highest edge of a mixing means sum band and the lowest edge of a mixing means difference band; and H.) said parameters N, n and θr having a second predetermined relationship so that F L =F 1 and F H =F i .

Claim 9

A direct frequency synthesizer comprising: A.) means for generating a set of fixed input frequency signals from F L to F H which define a frequency band B, the successive signals in said fixed frequency signal set being spaced from each other by a frequency increment D; and B.) a plurality (x) of cascaded stages, each of said stages having a. means for dividing said fixed input frequency signals by a divisor N; b. first filter means for passing said fixed input frequency signals and rejecting undesired signals after division by said divider means and for rejecting undesired signals outside said band B; c. means for generating a set of selectable LO frequency signals from f 1 to (f 1 +jθ) with the successive signals in said selectable LO frequency signal set being spaced from each other by a frequency increment θ; d. means for mixing said input frequency signals after filtered by said first filtered means and said selectable LO frequency signals to generate mixer product signals; e. first means for selectively coupling one of said input frequency signals and one of said selectable LO frequency signals to said mixing means for each selected synthesizer output frequency signal; f. output filter means coupled to the output of said mixing means for rejecting undesired signals and having a stage output; and C.) said generating means being coupled to the input of said dividing means of the first stage to apply said fixed frequency signals as said input frequency signals; D.) said stage output of each of said stages except the x stage being coupled to transmit input frequency signals to said dividing means of the next stage; E.) said output filter means for said x stage having a plurality of interconnected output filters for rejecting undesired signals and an output where the selected synthesizer output frequency is generated within a synthesizer output frequency band F 1 through F i ; F.) second means for selectively coupling the output of said mixing means of said x stage through one or more of said x stage output filters to said x stage filter output in accordance with the selected output frequency; G.) said frequency signals F H and F L being valued to provide continuous output frequency coverage in accordance with a first predetermined relationship among the parameters N, n, and θ where n is equal to an integer one less than the number of LO frequencies in the frequency span associated with the touching of the highest edge of a mixing means sum band and the lowest edge of a mixing means difference band; and H.) said parameters N, n and θr having a second predetermined relationship so that F L =F 1 and F H =F i .

Claim 10

The direct frequency synthesizer of claim 7 wherein the structure defined in subparagraph B is substantially identical for all of said stages.

Claim 11

The direct frequency synthesizer of claim 7 wherein no more than a single mixer is included in each of said mixer means.

Claim 12

The direct frequency synthesizer of claim 1 wherein filter shape factor Y is defined as a frequency to be rejected minus the center output filter frequency all divided by the output filter 3 db bandwidth, and wherein Y has a relatively increased value to simplify output filtering with a relatively increased value for F L and a relatively decreased value of the output filter bandwidth.

Claim 13

The direct frequency synthesizer of claim 2 wherein filter shape factor Y is defined as a frequency to be rejected minus the center output filter frequency all divided by the output filter 3 db bandwidth, and wherein Y=F L /N(BW).

Claim 14

The direct frequency synthesizer of claim 3 wherein filter shape factor Y is defined as a frequency to be rejected minus the center output filter frequency all divided by the output filter 3 db bandwidth, and wherein Y=(F L +F H )/2N(BW).

Claim 15

The direct frequency synthesizer of claim 7 wherein the value of N is made relatively high for spur reduction.

Claim 16

The direct frequency synthesizer of claim 7 wherein increased spur reduction is realized with a relatively increased value of n.

Claim 17

The direct frequency synthesizer of claim 7 wherein increased 1×2 spur reduction is realized with said first filter means having a relatively high center frequency and with F H less than two times F L .

Claim 18

The direct frequency synthesizer of claim 1 or 7 wherein multiplier means is coupled to the last filter output, said multiplier means comprising: a multiplier device having a multiplication factor of N; third means for selectively coupling one of said selectable LO frequency signals to said multiplier device; multiplier stage means for mixing frequency signals from said filter output with multiplied LO frequency signals from said multiplier device; and multiplier stage output filter means coupled to the output of said multiplier stage mixing means to generate frequency signals within a multiplied synthesizer output frequency band NF L through NF H .

Claim 19

The direct frequency synthesizer of claim 1 or 7 wherein said divider means in the first stage includes: respective divider devices each having a divisor N and having inputs to which said fixed frequency signals are respectively coupled; and wherein said first selective coupling means includes: first switch means selectively connectable to the output of each of said divider devices to couple said fixed input frequency signals to said first filter means in said first stage such that phase memory is provided as said fixed frequency signals are selectively switched; and second switch means selectively connecting said LO frequency signals to said mixing means in said first stage.

Claim 20

The direct frequency synthesizer of claim 3 or 7 wherein N is even and N=2(n-2) to provide optimum full overlap operation.

Claim 21

The direct frequency synthesizer of claim 7 wherein N=8 and n=6.

Claim 22

The direct frequency synthesizer of claim 7 wherein N=10 and n=7.

Claim 23

The direct frequency synthesizer of claim 7 wherein N=8 and n=10.

Claim 24

The direct frequency synthesizer of claim 22 wherein N=8 and n=6.

Claim 25

The direct frequency synthesizer of claim 7 wherein f 1 =F L =Nθ/2 and said fixed frequencies are the same as said selectable frequencies.

Claim 26

The direct frequency synthesizer of claim 2 wherein f 1 =F L =Nθ/2 and n equals 2 and said fixed frequencies are the same as said selectable frequencies.

Claim 27

The direct frequency synthesizer of claim 7 wherein continuous output frequency coverage is provided in accordance with a half overlap frequency pattern defined by the equations F L =Nθ(n-1)/2 and F H =nNθ/2 and wherein f 1 =F L =Nθ/2 and said fixed frequencies are the same as said selectable frequencies.

Claim 28

The direct frequency synthesizer of claim 7 wherein N=8.

Claim 29

The direct frequency synthesizer of claim 7 wherein N=10.

Claim 30

The direct frequency synthesizer of claim 7 wherein N=16.