IC memory card

Claim 2

An IC memory card comprising: an IC memory chip; a connector for electrically connecting said IC memory chip to a terminal; a control circuit for maintaining said IC memory chip inoperative during a fixed period of time after said connector has been connected to said terminal; and a data generating circuit for outputting to the terminal specific data corresponding to a predetermined address during said fixed period of time.

Claim 3

An IC memory card according to claim 1 wherein said card includes a card detect signal line for receiving a card detection signal form the terminal, a chip enable signal line for receiving an enable signal for enabling wiring of data into and reading data from said card, said control circuit including a multivibrator circuit connected to the card detect signal line, a first gate circuit connected between the chip enable signal line and said IC memory chip, a second gate circuit connected between said chip enable signal lien and said data generating circuit, said first and second gate circuits being connected to and controlled by said multivibrator circuit, the potential of said card detect signal line reversing when said connector is connected to the terminal, said multivibrator circuit maintaining said first gate circuit closed and said second gate circuit open during the fixed period of time after the potential on said card detect signal line has reversed, said multivibrator circuit opening said first gate circuit and closing said second gate circuit after the fixed period of time has elapsed.

Claim 4

An IC memory card according to claim 1 wherein said data generating circuit includes a first address identifying circuit for detecting designation of a first address, a second address identifying circuit for detecting designation of a second address, a first data holding circuit for outputting first data to the terminal when said first address identifying circuit detects designation of the first address, and a second data holding circuit for outputting second data to the terminal when said second address identifying circuit detects designation of the second address.

Claim 5

An IC memory card according to claim 3 wherein the first address is a minimum address and the second address is a maximum address.

Claim 6

An IC memory card comprising: an IC memory chip; a connector for electrically connecting the IC memory chip to a terminal; a control circuit coupled to the connector and responsive to the connector being connected to the terminal for maintaining the IC memory chip inoperative during a fixed period of time after the connector has been connected to the terminal; and a data generating circuit for outputting to the terminal specific data corresponding to a predetermined address during said fixed period of time.

Claim 7

An IC memory card comprising: an IC memory chip; a connector for electrically connecting the IC memory chip to a terminal; a control circuit coupled to the connector and responsive to the connector being connected to the terminal for maintaining the IC memory chip inoperative during a fixed period of time after the connector has been connected to the terminal; and a data generating circuit for outputting to the terminal specific data corresponding to a predetermined address during said fixed period of time.

Claim 8

An IC memory card according to claim 1 wherein the timing control circuit is responsive to a change in voltage on a card detect signal received from the connector.

Claim 9

An IC memory card according to claim 1 wherein the timing control circuit is responsive to a rise in voltage on a power line signal received from the connector.