US5161203A
Expired / Lapsed
US
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Self-organizing circuits
Assignee: Individual
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Filing: 1991-01-28
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Granted: 1992-11-03
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Expires: 2011-01-28
Abstract
Abstract Self-organizing circuits to receive input signals from transducers and the like and operable, under guidance from modifying inputs thereto, operate in a learning mode and systems embodying such self-organizing circuits. The circuits include mechanisms to change the modifying inputs based upon Boolean functions and further mechanisms to change the modifying inputs based upon competition among the input signals. Burst, bias, clipping and share circuits have been added to the system for the purpose of improving the "teaching" of the system. The present invention incorporates burst function circuits which amplify the influence of sub-circuits which fire in short bursts or randomly. Bias circuits ensure that sub-circuits fire consistently by specifying the number of other sub-circuits input that will be required to cause the biased sub-circuit to fire. Clipping circuits provide a method by which a sub-circuit will not fire if too many other sub-circuits influence it. Share is a method by like-signed influences on a sub-circuit grow at more nearly uniform rates.
Inventors
- 👤 B. Shawn Buckley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 12:32
CPC Classifications
G; G09; G09B; G09B25/00; G09B25/02; G06; G06V; G06V30/00; G06V30/10; G06V30/19; G06V30/192; G06V30/194
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
199 words
A self-organizing circuit, having a plurality of sub-circuits or levels which are connected to receive messages from some other sub-circuit or level and are operable to deliver messages to some other sub-circuit or level, having voting in each sub-circuit or level by weighting relative amounts of positive and negative influence thereto regarding whether or not to pass along information to the further sub-circuits or levels, comprising: error correcting means acting on each sub-circuit or level of said self-organizing circuit which serves to correct errors by modifying the strength of connections between said sub-circuits or levels occasioned by inaccurate analysis of the input by said self-organizing circuit and for effecting analysis of a first pattern of constituent elements and at a later time to apply said error correcting means to effect analysis of a second pattern of constituent elements without modifying the strength of at least a portion of said connections made during said first application of error correction means; burst function means for amplifying the influence of sub-circuits or levels which fire in short bursts and for attenuating the influence of sub-circuits or levels which fire randomly wherein the learning patterns of said self-organizing circuit are made more stable.
Claim 2
Dependent Claim
199 words
A self-organizing circuit, having a plurality of sub-circuits or levels which are connected to receive messages from some other sub-circuit or level and are operable to deliver messages to some other sub-circuit or level, having voting in each sub-circuit or level by weighting relative amounts of positive and negative influence thereto regarding whether or not to pass along information to the further sub-circuits or levels, comprising: error correcting means acting on each sub-circuit or level of said self-organizing circuit which serves to correct errors by modifying the strength of connections between said sub-circuits or levels occasioned by inaccurate analysis of the input by said self-organizing circuit and for effecting analysis of a first pattern of constituent elements and at a later time to apply said error correcting means to effect analysis of a second pattern of constituent elements without modifying the strength of at least a portion of said connections made during said first application of error correction means; burst function means for amplifying the influence of sub-circuits or levels which fire in short bursts and for attenuating the influence of sub-circuits or levels which fire randomly wherein the learning patterns of said self-organizing circuit are made more stable.
Claim 3
Dependent Claim
170 words
A self-organizing circuit, having a plurality of sub-circuits or levels which are connected to receive messages from some other sub-circuit or level and are operable to deliver messages to some other sub-circuit or level, having voting in influence thereto regarding whether or not to pass along information to the further sub-circuits or levels, comprising: error correcting means acting on each sub-circuit or level of said self-organizing circuit which serves to correct errors by modifying the strength of connections between said sub-circuits or levels occasioned by inaccurate analysis of the input by said self-organizing circuit and for effecting analysis of a first pattern of constituent elements and at a later time to apply said error correcting means to effect analysis of a second pattern of constituent elements without modifying the strength of at least a portion of said connections made during said first application of error correction means; bias function means for selectively biasing said sub-circuits or levels to ensure consistent firing of said sub-circuits in response to minimum input strength.
Claim 4
Dependent Claim
170 words
A self-organizing circuit, having a plurality of sub-circuits or levels which are connected to receive messages from some other sub-circuit or level and are operable to deliver messages to some other sub-circuit or level, having voting in influence thereto regarding whether or not to pass along information to the further sub-circuits or levels, comprising: error correcting means acting on each sub-circuit or level of said self-organizing circuit which serves to correct errors by modifying the strength of connections between said sub-circuits or levels occasioned by inaccurate analysis of the input by said self-organizing circuit and for effecting analysis of a first pattern of constituent elements and at a later time to apply said error correcting means to effect analysis of a second pattern of constituent elements without modifying the strength of at least a portion of said connections made during said first application of error correction means; bias function means for selectively biasing said sub-circuits or levels to ensure consistent firing of said sub-circuits in response to minimum input strength.
Claim 5
Dependent Claim
39 words
The self-organizing circuit of claim 2 wherein said bias function further comprises a bias of sufficient strength on said sub-circuits such that input from a plurality of other sub-circuits is required in order to have the biased sub-circuit fire.
Claim 6
Dependent Claim
21 words
The self-organizing circuit of claim 3 wherein said bias function means causes the biased sub-circuit to behave as an AND circuit.
Claim 7
Dependent Claim
21 words
The self-organizing circuit of claim 3 wherein said bias functions means causes the biased sub-circuit to behave as an NAND circuit.
Claim 8
Dependent Claim
38 words
The self-organizing circuit of claim 2 wherein said bias function means further comprises a bias strength of sufficient strength on said sub-circuits such that input from a single sub-circuit is sufficient to cause the biased sub-circuit to fire.
Claim 9
Dependent Claim
21 words
The self-organizing circuit of claim 6 wherein said bias function means causes the biased sub-circuit to behave as an OR circuit.
Claim 10
Dependent Claim
21 words
The self-organizing circuit of claim 6 wherein said bias function means causes the biased sub-circuit to behave as an NOR circuit.
Claim 11
Dependent Claim
180 words
A self-organizing circuit, having a plurality of sub-circuits or levels which are connected to receive messages from some other sub-circuit or level and are operable to deliver messages to some other sub-circuit or level, having voting in each sub-circuit or level by weighting relative amounts of positive and negative influence thereto regarding whether or not to pass along information to the further sub-circuits or levels, comprising: error correcting means acting on each sub-circuit or level of said self-organizing circuit which serves to correct errors by modifying the strength of connections between said sub-circuits or levels occasioned by inaccurate analysis of the input by said self-organizing circuit and for effecting analysis of a first pattern of constituent elements and at a later time to apply said error correcting means to effect analysis of a second pattern of constituent elements without modifying the strength of at least a portion of said connections made during said first application of error correction means; clipping means for preventing sub-circuits from firing if said sub-circuits are influenced by more than a selected number of other sub-circuits.
Claim 12
Dependent Claim
180 words
A self-organizing circuit, having a plurality of sub-circuits or levels which are connected to receive messages from some other sub-circuit or level and are operable to deliver messages to some other sub-circuit or level, having voting in each sub-circuit or level by weighting relative amounts of positive and negative influence thereto regarding whether or not to pass along information to the further sub-circuits or levels, comprising: error correcting means acting on each sub-circuit or level of said self-organizing circuit which serves to correct errors by modifying the strength of connections between said sub-circuits or levels occasioned by inaccurate analysis of the input by said self-organizing circuit and for effecting analysis of a first pattern of constituent elements and at a later time to apply said error correcting means to effect analysis of a second pattern of constituent elements without modifying the strength of at least a portion of said connections made during said first application of error correction means; clipping means for preventing sub-circuits from firing if said sub-circuits are influenced by more than a selected number of other sub-circuits.
Claim 13
Dependent Claim
53 words
The self-organizing circuit of claim 9 wherein said clipping means further comprises sufficient clipping strength influence on said sub-circuits which will cause said sub-circuits to change when said sub-circuits receive the input from a single other sub-circuit and said sub-circuits will not change upon receiving the inputs from more than one other sub-circuit.
Claim 14
Dependent Claim
26 words
The self-organizing circuit of claim 10 wherein said clipping means causes said sub-circuits to behave as XOR circuit.will fire under influence from a single other sub-circuit.
Claim 15
Dependent Claim
57 words
The self-organizing circuit of claim 9 wherein said clipping means further comprises sufficient clipping strength influence on said sub-circuits which will cause said sub-circuits to change when said sub-circuits receive the input from a plurality of other sub-circuits and said sub-circuits will not change upon receiving the inputs from more than the said plurality of other sub-circuits.
Claim 16
Dependent Claim
18 words
The self-organizing circuit of claim 12 wherein said clipping means causes said sub-circuits to behave as XNOR circuit.
Claim 17
Dependent Claim
185 words
A self-organizing circuit, having a plurality of sub-circuits or levels which are connected to receive messages from some other sub-circuit or level and are operable to deliver messages to some other sub-circuit or level, having voting in each sub-circuit or level by weighting relative amounts of positive and negative influence thereto regarding whether or not to pass along information to the further sub-circuits or levels, comprising: error correcting means acting on each sub-circuit or level of said self-organizing circuit which serves to correct errors by modifying the strength of connections between said sub-circuits or levels occasioned by inaccurate analysis of the input by said self-organizing circuit and for effecting analysis of a first pattern of constituent elements and at a later time to apply said error correcting means to effect analysis of a second pattern of constituent elements without modifying the strength of at least a portion of said connections made during said first application of error correction means; share means for influencing said sub-circuits wherein feedback causes slower changing sub-circuits to change more quickly and feedback causes faster changing sub-circuits to change more slowly.
Claim 18
Dependent Claim
185 words
A self-organizing circuit, having a plurality of sub-circuits or levels which are connected to receive messages from some other sub-circuit or level and are operable to deliver messages to some other sub-circuit or level, having voting in each sub-circuit or level by weighting relative amounts of positive and negative influence thereto regarding whether or not to pass along information to the further sub-circuits or levels, comprising: error correcting means acting on each sub-circuit or level of said self-organizing circuit which serves to correct errors by modifying the strength of connections between said sub-circuits or levels occasioned by inaccurate analysis of the input by said self-organizing circuit and for effecting analysis of a first pattern of constituent elements and at a later time to apply said error correcting means to effect analysis of a second pattern of constituent elements without modifying the strength of at least a portion of said connections made during said first application of error correction means; share means for influencing said sub-circuits wherein feedback causes slower changing sub-circuits to change more quickly and feedback causes faster changing sub-circuits to change more slowly.
Claim 19
Dependent Claim
19 words
The self-organizing circuit of claim 14 wherein said share means causes said sub-circuits to behave as an AND circuit.
Claim 20
Dependent Claim
19 words
The self-organizing circuit of claim 14 wherein said share means causes said sub-circuits to behave as an NAND circuit.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-11-03 | 1996-05-04 | 1996-11-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-11-03 | 2000-05-04 | 2000-11-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-11-03 | 2004-05-04 | 2004-11-03 | $7700.00 | Window Closed / Lapsed |