US5160579A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process for manufacturing printed circuit employing selective provision of solderable coating
Assignee: MacDermid Acumen Inc
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Filing: 1991-06-05
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Granted: 1992-11-03
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Expires: 2011-06-05
Abstract
Abstract The areas of a printed circuit where electrical components are to be solder connected, such as throughholes, surrounding pads and surface mount areas, are selectively provided with a metal coating (e.g., tin-lead) which preserves and promotes solderability thereat, by a process in which a photoimageable electrophoretically deposited organic resin is used to provide, on an already patterned surface, an additional resist pattern which selectively exposes areas on which the solderable metal coating is to be provided and in which the resist serves also as an etch resist for metal areas over which it is arranged.
Inventors
- 👤 Gary B. Larson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 12:01
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/22; H05K3/24; H05K3/243; H05K3/02; H05K3/06; H05K3/061; H05K3/064; H05K3/10; H05K3/108; H05K2203/00; H05K2203/05; H05K2203/0562; H05K2203/0582; H05K2203/07; H05K2203/0779; H05K2203/0786; H05K2203/0796; H05K2203/13; H05K2203/1333; H05K2203/135; H05K3/28; H05K3/30; H05K3/32; H05K3/34; H05K3/3465; H05K3/3473; H05K3/40; H05K3/42; H05K3/425; H05K3/427; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49155; Y10T29/49165
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
245 words
A process for fabricating a printed circuit in which selected conductive areas, including through-holes and surrounding pads, are selectively provided with a solderable metal coating which maintains and promotes the solderability of electrical components thereat, said process comprising the steps of: (a) providing a printed circuit material comprised of a metallized insulating substrate material having through-holes formed therein; (b) metallizing the surfaces of said through-holes; (c) providing on said printed circuit material a primary plating resist in the negative of the pattern of desired conductive circuitry of said printed circuit; (d) thereafter providing additional metal over those metallized areas of the printed circuit material not covered by said primary plating resist; (e) thereafter selectively electrophoretically applying, over those areas of said printed circuit material provided with said additional metal, a photoimageable electrophoretically depositable organic resin; (f) thereafter imagewise exposing and developing said photoimageable electrophoretically applied resin to provide a pattern of a second resist on said printed circuit material, said pattern of said second resist being such that, of all conductive areas, only the selected conductive areas, including through-holes and surrounding pads, which are to be provided with a solderable metal coating, remain exposed; (g) thereafter selectively providing a solderable metal coating only on said exposed conductive areas; (h) thereafter selectively removing said primary plating resist from said printed circuit material; (i) thereafter etching away metal which was under said primary plating resist; and (j) thereafter removing said second resist from said printed circuit material.
Claim 2
Dependent Claim
245 words
A process for fabricating a printed circuit in which selected conductive areas, including through-holes and surrounding pads, are selectively provided with a solderable metal coating which maintains and promotes the solderability of electrical components thereat, said process comprising the steps of: (a) providing a printed circuit material comprised of a metallized insulating substrate material having through-holes formed therein; (b) metallizing the surfaces of said through-holes; (c) providing on said printed circuit material a primary plating resist in the negative of the pattern of desired conductive circuitry of said printed circuit; (d) thereafter providing additional metal over those metallized areas of the printed circuit material not covered by said primary plating resist; (e) thereafter selectively electrophoretically applying, over those areas of said printed circuit material provided with said additional metal, a photoimageable electrophoretically depositable organic resin; (f) thereafter imagewise exposing and developing said photoimageable electrophoretically applied resin to provide a pattern of a second resist on said printed circuit material, said pattern of said second resist being such that, of all conductive areas, only the selected conductive areas, including through-holes and surrounding pads, which are to be provided with a solderable metal coating, remain exposed; (g) thereafter selectively providing a solderable metal coating only on said exposed conductive areas; (h) thereafter selectively removing said primary plating resist from said printed circuit material; (i) thereafter etching away metal which was under said primary plating resist; and (j) thereafter removing said second resist from said printed circuit material.
Claim 3
Dependent Claim
36 words
A process according to claim 1, further comprising the step, after step (j), of providing areas of said printed circuit material, other than those selected areas having said solderable metal coating thereon, with a solder mask.
Claim 4
Dependent Claim
15 words
A process according to claim 1 wherein said solderable metal coating is electroplated tin-lead alloy.
Claim 5
Dependent Claim
17 words
A process according to claim 3 wherein said metallizing of said through-holes is by electroless copper deposition.
Claim 6
Dependent Claim
22 words
A process according to claim 4 wherein the providing of additional metal of step (d) comprises electroplating copper over said metallized areas.
Claim 7
Dependent Claim
25 words
A process according to claim 1 wherein said plating resist of step (c) is provided by the application, imagewise exposure and development of a photoresist.
Claim 8
Dependent Claim
13 words
A process according to claim 6 wherein said photoresist is a dry-film photoresist.
Claim 9
Dependent Claim
15 words
A process according to claim 1 wherein said photoimageable electrophoretically depositable organic resin is negative-working.
Claim 10
Dependent Claim
232 words
A process for fabricating a printed circuit in which selected conductive areas, including through-holes and surrounding pads, are selectively provided with a tin-lead coating to preserve and promote the solderability of said areas, comprising the sequential steps of: (a) providing a printed circuit material comprised of an insulating substrate material coated on its outer-facing planar surfaces with copper and having one or more through-holes provided therein; (b) electrolessly providing a layer of copper over said copper coating and said through-hole surfaces; (c) providing over said electroless copper a primary plating resist in the negative of the pattern of the desired conductive circuitry of said printed circuit; (d) electroplating copper over the electroless copper areas, including through-holes and surrounding pads, not covered by said primary plating resist; (e) selectively electrophoretically depositing over the electroplated copper areas a negative-working photoimageable electrophoretically depositable organic resin; (f) imagewise exposing and developing said organic resist to provide a second resist in a pattern such that only those electroplated copper areas, including through-holes and surrounding pads, which are to receive said tin-lead coating, are exposed; (g) selectively electroplating tin-lead over said exposed electroplated copper areas, including through-holes and pads; (h) selectively removing said primary plating resist; (i) selectively etching away the copper previously under said primary plating resist; (j) removing said second resist; and (k) solder masking areas of said printed circuit not having said tin-lead coating thereon.
Claim 11
Dependent Claim
232 words
A process for fabricating a printed circuit in which selected conductive areas, including through-holes and surrounding pads, are selectively provided with a tin-lead coating to preserve and promote the solderability of said areas, comprising the sequential steps of: (a) providing a printed circuit material comprised of an insulating substrate material coated on its outer-facing planar surfaces with copper and having one or more through-holes provided therein; (b) electrolessly providing a layer of copper over said copper coating and said through-hole surfaces; (c) providing over said electroless copper a primary plating resist in the negative of the pattern of the desired conductive circuitry of said printed circuit; (d) electroplating copper over the electroless copper areas, including through-holes and surrounding pads, not covered by said primary plating resist; (e) selectively electrophoretically depositing over the electroplated copper areas a negative-working photoimageable electrophoretically depositable organic resin; (f) imagewise exposing and developing said organic resist to provide a second resist in a pattern such that only those electroplated copper areas, including through-holes and surrounding pads, which are to receive said tin-lead coating, are exposed; (g) selectively electroplating tin-lead over said exposed electroplated copper areas, including through-holes and pads; (h) selectively removing said primary plating resist; (i) selectively etching away the copper previously under said primary plating resist; (j) removing said second resist; and (k) solder masking areas of said printed circuit not having said tin-lead coating thereon.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-11-03 | 1996-05-04 | 1996-11-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-11-03 | 2000-05-04 | 2000-11-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-11-03 | 2004-05-04 | 2004-11-03 | $7700.00 | Window Closed / Lapsed |