← Back to Patent Explorer
US5159442A Expired / Lapsed US ⏱️ 0.0 years remaining

Color signal processing apparatus

Assignee: Sony Corp
•
Filing: 1990-10-01
•
Granted: 1992-10-27
•
Expires: 2010-10-01
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A color signal processing apparatus comprising a first delay circuit for delaying an input chroma signal; a second delay circuit for delaying an output of the first delay circuit; a plurality of gain control circuits for controlling the amplitudes of the input chroma signal and the outputs of the first and second delay circuits, respectively; and an operating circuit for operating the gain-controlled amplitudes of the input chroma signal and the outputs of the first and second delay circuits, wherein the phases of the outputs of the first and second delay circuits are matched with the phase of the input chroma signal.

Inventors

  • 👤 Masashi Mizuta

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 16:49
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/79; H04N9/64; H04N9/646

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 175 words
A color signal processing apparatus comprising: (a) first delay means for delaying a chroma input signal to produce delayed output signal; (b) second delay means connected to series to said first delay means for delaying said delayed output signal of said first delay means; (c) first subtracting means operatively disposed for obtaining a first difference between the input and output signals of said first delay means; (d) second subtracting means operatively disposed for obtaining a second difference between the input and output signals of said second delay means; (e) first signal processing means operatively disposed for processing said first difference signal to obtain a first enhanced signal; (f) second signal processing means operatively disposed for processing said second difference signal to obtain a second enhanced signal; (g) first adding means operatively disposed for adding said first and second enhanced signals of said first and second signal processing means; and (h) second adding means operatively disposed for adding an added enhanced signal of said first adding means to the output signal of said first delay means.
Claim 2
Dependent Claim 175 words
A color signal processing apparatus comprising: (a) first delay means for delaying a chroma input signal to produce delayed output signal; (b) second delay means connected to series to said first delay means for delaying said delayed output signal of said first delay means; (c) first subtracting means operatively disposed for obtaining a first difference between the input and output signals of said first delay means; (d) second subtracting means operatively disposed for obtaining a second difference between the input and output signals of said second delay means; (e) first signal processing means operatively disposed for processing said first difference signal to obtain a first enhanced signal; (f) second signal processing means operatively disposed for processing said second difference signal to obtain a second enhanced signal; (g) first adding means operatively disposed for adding said first and second enhanced signals of said first and second signal processing means; and (h) second adding means operatively disposed for adding an added enhanced signal of said first adding means to the output signal of said first delay means.
Claim 3
Dependent Claim 31 words
The apparatus of claim 1, wherein each of said first and second signal processing means comprises a limiter circuit, a noise slicing circuit, and a gain control amplifier connected in series.
Claim 4
Dependent Claim 23 words
The apparatus of claim 1, wherein phases of the input and output signals of said first delay means are matched with each other.
Claim 5
Dependent Claim 23 words
The apparatus of claim 1, wherein phases of the input and output signals of said second delay means are matched with each other.

References Cited (Backward Citations)

US4041531A Cited
US4343017A Cited
US4402006A Cited
US4504853A Cited
JPS58205379A Cited
JPS5961283A Cited
GB2171272A Cited
JPS62221294A Cited
EP0342511A2 Cited
US4935806A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-10-27 1996-04-27 1996-10-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-10-27 2000-04-27 2000-10-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-10-27 2004-04-27 2004-10-27 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag