Signal digitizer for bar code readers

Claim 2

A signal digitizer for digitizing a continuous time varying input signal having values positive and negative of a reference level, the signal digitizer comprising: a positive peak detector coupled to the input signal for storing the most positive peak value of the input signal; a negative peak detector coupled to the input signal for storing the most negative peak value of the input signal; divider means coupled to the positive and negative peak detectors for producing a threshold voltage representative of a voltage between the outputs of the positive and negative peak detectors; means for comparing the threshold voltage to the input signal and for producing one binary value when the input signal is more positive than the threshold voltage and a different binary value when the input signal is more negative than the threshold voltage; and limiter means coupled to the outputs of the peak detectors for maintaining a maximum voltage potential between the peak detectors.

Claim 3

A signal digitizer as recited in claim 1 wherein the limiter means comprises means for allowing the positive peak detector to update the its stored value while the negative peak detector is storing the value of the negative peak of the input signal and allowing the negative peak detector to update its stored value while the positive peak detector is storing the value of the positive peak of the input signal.

Claim 4

A signal digitizer as recited in claim 1 wherein the limiter means comprises a clamping diode.

Claim 5

A signal digitizer as recited in claim 3 wherein the positive peak detector comprises a capacitor that is charged to the value of the most positive peak of the input signal during the positive cycle of the input signal and is capable of being discharged through the clamping diode during the negative cycle of the input signal.

Claim 6

A signal digitizer as recited in claim 4 wherein the negative peak detector comprises a capacitor that is charged to the value of the most negative peak of the input signal during the negative cycle of the input signal and is capable of being discharged through the clamping diode during the positive cycle of the input signal.

Claim 7

A signal digitizer as recited in claim 1 further comprising means coupled to the outputs of the peak detectors for maintaining a minimum voltage potential between the peak detectors regardless of the peak to peak amplitude of the input signal.

Claim 8

A level detector for digitizing a continuous time varying input signal comprising: a positive peak detector coupled to the input signal; a negative peak detector coupled to the input signal; divider means coupled to the positive and negative peak detectors for producing a threshold voltage representative of a voltage between the outputs of the positive and negative peak detectors; means for comparing the threshold voltage to the input signal and for producing one binary value when the input signal is more positive than the threshold voltage and a different binary value when the input signal is more negative than the threshold voltage; and separator means coupled to the outputs of the peak detectors for maintaining a minimum potential between the peak detectors regardless of the amplitude of the input signal.

Claim 9

A level detector for digitizing a continuous time varying input signal comprising: a positive peak detector coupled to the input signal; a negative peak detector coupled to the input signal; divider means coupled to the positive and negative peak detectors for producing a threshold voltage representative of a voltage between the outputs of the positive and negative peak detectors; means for comparing the threshold voltage to the input signal and for producing one binary value when the input signal is more positive than the threshold voltage and a different binary value when the input signal is more negative than the threshold voltage; and separator means coupled to the outputs of the peak detectors for maintaining a minimum potential between the peak detectors regardless of the amplitude of the input signal.

Claim 10

A level detector as recited in claim 7 wherein the separator means comprises: a pull-up resistor connected between the output of the positive peak detector and a supply voltage; and a pull-down resistor connected between the output of the negative peak detector and ground.

Claim 11

A level detector as recited in claim 7 wherein the separator means maintains at least a 100 mV potential between the outputs of the positive and negative peak detectors.

Claim 12

A level detector as recited in claim 7 wherein the separator means comprises a first current source connected to the output of the positive peak detector and a second current source connected to the negative peak detector.

Claim 13

A level detector as recited in claim 7 comprising limiter means coupled to the outputs of the peak detectors for maintaining a maximum voltage potential between the peak detectors.

Claim 14

A data converter for digitizing a continuous time varying input signal comprising: positive detector means for storing the value of the input signal, the positive detector means independently updating the stored value only when the input signal has a positive slope; negative detector means for storing the value of the input signal, the negative detector means independently updating the stored value only when the input signal has a negative slope; clamping means coupled to the positive detector means and the negative detector means for maintaining a specified maximum potential between the positive and negative detector means, the clamping means dependently updating the stored value of the negative detector when the input signal has a positive slope and the clamping means dependently updating the stored value of the positive detector when the input signal has a negative slope; divider means coupled to the positive and negative detector means for providing a threshold voltage; and comparator means coupled to the input signal and the threshold voltage for providing a binary signal, the value of the binary signal being dependent upon the relative potentials of the input signal and the threshold voltage.

Claim 15

A data converter for digitizing a continuous time varying input signal comprising: positive detector means for storing the value of the input signal, the positive detector means independently updating the stored value only when the input signal has a positive slope; negative detector means for storing the value of the input signal, the negative detector means independently updating the stored value only when the input signal has a negative slope; clamping means coupled to the positive detector means and the negative detector means for maintaining a specified maximum potential between the positive and negative detector means, the clamping means dependently updating the stored value of the negative detector when the input signal has a positive slope and the clamping means dependently updating the stored value of the positive detector when the input signal has a negative slope; divider means coupled to the positive and negative detector means for providing a threshold voltage; and comparator means coupled to the input signal and the threshold voltage for providing a binary signal, the value of the binary signal being dependent upon the relative potentials of the input signal and the threshold voltage.

Claim 16

A data converter as recited in claim 12 wherein the clamping means comprises a diode connected between the output of the positive detector means and the negative detector means.

Claim 17

A data converter as recited in claim 13 wherein the diode has a forward bias voltage substantially equal to the specified maximum potential to be maintained between the positive and negative detector means.

Claim 18

An analog-to-digital converter for converting an analog signal to a discrete signal, the converter comprising: a positive peak detector coupled to the input signal for storing the most recent highest peak value of the input signal; a negative peak detector coupled to the input signal for storing the most recent lowest peak value of the input signal; clamping means for limiting the maximum potential between the positive peak detector and the negative peak detector to a first selected level; separator means for limiting the minimum potential between the positive peak detector and the negative peak detector to a second selected level; divider means coupled to the positive and negative peak detectors for producing a threshold voltage have a potential between the voltage potentials of the positive peak detector and the negative peak detector; and means for comparing the threshold voltage to the input signal and for producing one binary value when the input signal is more positive than the threshold voltage and a different binary value when the input signal is more negative than the threshold voltage.

Claim 19

An analog-to-digital converter for converting an analog signal to a discrete signal, the converter comprising: a positive peak detector coupled to the input signal for storing the most recent highest peak value of the input signal; a negative peak detector coupled to the input signal for storing the most recent lowest peak value of the input signal; clamping means for limiting the maximum potential between the positive peak detector and the negative peak detector to a first selected level; separator means for limiting the minimum potential between the positive peak detector and the negative peak detector to a second selected level; divider means coupled to the positive and negative peak detectors for producing a threshold voltage have a potential between the voltage potentials of the positive peak detector and the negative peak detector; and means for comparing the threshold voltage to the input signal and for producing one binary value when the input signal is more positive than the threshold voltage and a different binary value when the input signal is more negative than the threshold voltage.

Claim 20

A one-bit analog-to-digital converter comprising: a first precision diode having an anode and a cathode, the anode being connected to the input signal; a second precision diode having an anode and a cathode, the cathode being connected to the input signal; a first storage capacitor coupled to the cathode of the first precision diode; a second storage capacitor coupled to the anode of the second precision diode; a resistive voltage divider connected between the cathode of the first precision diode and the anode of the second precision diode, the voltage divider having an output representative of a voltage potential between the voltage potentials at the outputs of the precision diodes; a pull-down resistor connected between the anode of the second precision diode and ground; a pull-up resistor connected between the cathode of the first precision diode and a positive power supply; a clamping diode having an anode connected to the cathode of the first precision diode and a cathode connected to the anode of the second precision diode; and a comparator having one input connected to the output of the voltage divider and the other input connected to the input signal, the output of the comparator providing a binary signal representative of the potential of the input signal relative to the threshold voltage.

Claim 21

A one-bit analog-to-digital converter comprising: a first precision diode having an anode and a cathode, the anode being connected to the input signal; a second precision diode having an anode and a cathode, the cathode being connected to the input signal; a first storage capacitor coupled to the cathode of the first precision diode; a second storage capacitor coupled to the anode of the second precision diode; a resistive voltage divider connected between the cathode of the first precision diode and the anode of the second precision diode, the voltage divider having an output representative of a voltage potential between the voltage potentials at the outputs of the precision diodes; a pull-down resistor connected between the anode of the second precision diode and ground; a pull-up resistor connected between the cathode of the first precision diode and a positive power supply; a clamping diode having an anode connected to the cathode of the first precision diode and a cathode connected to the anode of the second precision diode; and a comparator having one input connected to the output of the voltage divider and the other input connected to the input signal, the output of the comparator providing a binary signal representative of the potential of the input signal relative to the threshold voltage.

Claim 22

A level detector as recited in claim 16 wherein the first precision diode comprises: a diode having an anode and a cathode; and an operational amplifier having its inverting input connected to the cathode of the diode, the inverting input being the cathode of the precision diode and the non-inverting input being the anode of the precision diode.

Claim 23

A level detector as recited in claim 17 wherein the second precision diode comprises: a diode having an anode and a cathode; and an operational amplifier having its inverting input connected to the anode of the diode, the non-inverting input being the cathode of the precision diode and the inverting input being the anode of the precision diode.