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US5158467A Expired / Lapsed US ⏱️ 0.0 years remaining

High speed bare chip test socket

Assignee: TE Connectivity Corp
•
Filing: 1991-11-01
•
Granted: 1992-10-27
•
Expires: 2011-11-01
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Abstract

Abstract An electrical socket (10) for interconnecting circuits on an integrated circuit chip to circuits on a substrate is disclosed. The socket (10) includes a base section (12), an upper section (16) and a metallized plastic membrane (14) having circuit traces (72) thereon. Contact pins (52) in the upper section (16) electrically connect circuits on the chip to inner ends (82) of the traces (72) and outer ends (84) of the traces (72) engage circuits on a substrate.

Inventors

  • 👤 Dimitry G. Grabbe
  • 👤 Iosif Korsunsky
  • 👤 Daniel R. Ringler

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 16:21
CPC Classifications
H; H05; H05K; H05K7/00; H05K7/02; H05K7/10; H05K7/1015; H05K7/1023

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 140 words
An electrical socket for interconnecting integrated circuit chip circuits to circuits on a substrate, comprising: a base section; an upper section having a contact pin retaining portion, conductive contact pins in said retaining portion with first and second ends protruding from opposite surfaces and a frame overlying said retaining portion and having an opening therethrough for receiving an integrated circuit chip with circuits on said chip engaging first ends of respective said contact pins; and a membrane comprising a dielectric base layer with conductive circuit traces on one surface thereof, said membrane having an inner portion positioned between said base section and said upper section with inner ends of said circuit traces engaging second ends of said contact pins and an outer portion extending outwardly from said socket with outer ends of said circuit traces engaging circuits on a substrate.
Claim 2
Dependent Claim 140 words
An electrical socket for interconnecting integrated circuit chip circuits to circuits on a substrate, comprising: a base section; an upper section having a contact pin retaining portion, conductive contact pins in said retaining portion with first and second ends protruding from opposite surfaces and a frame overlying said retaining portion and having an opening therethrough for receiving an integrated circuit chip with circuits on said chip engaging first ends of respective said contact pins; and a membrane comprising a dielectric base layer with conductive circuit traces on one surface thereof, said membrane having an inner portion positioned between said base section and said upper section with inner ends of said circuit traces engaging second ends of said contact pins and an outer portion extending outwardly from said socket with outer ends of said circuit traces engaging circuits on a substrate.
Claim 3
Dependent Claim 27 words
The socket of claim 1 further including spring means underlying said inner ends of said circuit traces for resiliently opposing forces being applied to said inner ends.
Claim 4
Dependent Claim 21 words
The socket of claim 2 wherein said spring means include spring fingers with each finger underlying a respective said circuit trace.
Claim 5
Dependent Claim 23 words
The socket of claim 1 wherein said retaining portion includes holes therethrough for receiving said contact pins and for receiving a viscous compound.
Claim 6
Dependent Claim 15 words
The socket of claim 4 wherein said retaining portion is formed of two glass layers.
Claim 7
Dependent Claim 14 words
The socket of claim 1 wherein said contact pins are formed from Palliney 7.
Claim 8
Dependent Claim 15 words
The socket of claim 1 wherein said contact pins are formed from ORO 28 A.
Claim 9
Dependent Claim 19 words
The socket of claim 1 further including ground plane means on an opposite surface of said membrane base layer.
Claim 10
Dependent Claim 14 words
The socket of claim 8 wherein said ground plane means include a metallic sheet.
Claim 11
Dependent Claim 21 words
The socket of claim 1 wherein said ground plane means include traces essentially being a mirror image of said circuit traces.
Claim 12
Dependent Claim 24 words
The socket of claim 9 wherein outer ends of said ground plane traces are laterally off-set relative to respective said circuit trace outer ends.

References Cited (Backward Citations)

US3885173A Cited
US3951495A Cited
US4079511A Cited
US4089575A Cited
US4426769A Cited
US4513353A Cited
US4560826A Cited
US4684184A Cited
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US4832612A Cited
US4880386A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-10-27 1996-04-27 1996-10-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-10-27 2000-04-27 2000-10-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-10-27 2004-04-27 2004-10-27 $7700.00 Window Closed / Lapsed

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