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Method of controlling an inverter

Assignee: Mitsubishi Electric Corp
•
Filing: 1990-10-30
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Granted: 1992-10-13
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Expires: 2010-10-30
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Abstract

Abstract In a method of controlling the output voltage of a three-phase three-level inverter having a plurality of switching elements by pulse width modulation in each of three-pulse and one-pulse modes, the upper limit of the percentage modulation is set to a value equal to or smaller than the maximum percentage modulation determined by the minimum switching element off time to output a three-level voltage as an inverter output voltage in each phase if each of the switching element is turned of and off one time during one inverter output period.

Inventors

  • 👤 Takafumi Maruyama
  • 👤 Masayoshi Kumano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 19:24
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/483; H02M7/487; H02M7/4837; H02P; H02P27/00; H02P27/04; H02P27/06; H02P27/08; H02P27/14

Claims Analysis

Total Claims: 3
Claim 1
Independent Claim 102 words
A method of controlling the output voltage of a three-phase three-level inverter having a plurality of switching elements by pulse width modulation, comprising the steps of: setting an upper limit of a percentage modulation to a value equal to or smaller than a maximum percentage modulation determined by a minimum off time of the switching elements; applying gate signals to the switching elements for turning the switching elements on and off; and outputting a three-level voltage as an inverter output voltage in each phase when each of the switching elements is turned on and off one time during an inverter output period.
Claim 2
Independent Claim 102 words
A method of controlling the output voltage of a three-phase three-level inverter having a plurality of switching elements by pulse width modulation, comprising the steps of: setting an upper limit of a percentage modulation to a value equal to or smaller than a maximum percentage modulation determined by a minimum off time of the switching elements; applying gate signals to the switching elements for turning the switching elements on and off; and outputting a three-level voltage as an inverter output voltage in each phase when each of the switching elements is turned on and off one time during an inverter output period.
Claim 3
Dependent Claim 38 words
A method of controlling the output voltage of a three-phase three-level inverter according to claim 1 further including the step of: controlling the inverter output voltage by pulse width modulation in a three-pulse mode and a one-pulse mode.

References Cited (Backward Citations)

US4203151A Cited
US4270163A Cited
EP0336019A1 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-10-13 1996-04-13 1996-10-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-10-13 2000-04-13 2000-10-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-10-13 2004-04-13 2004-10-13 $7700.00 Window Closed / Lapsed

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