US5151776A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Die attachment method for use in high density interconnected assemblies
Assignee: Lockheed Martin Corp
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Filing: 1991-03-19
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Granted: 1992-09-29
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Expires: 2011-03-19
Abstract
Abstract A method for grounding or electrically biasing an integrated circuit chip without using a conductive die attach material comprises affixing the chips to a substrate using a thermoplastic polyimide adhesive. A metallization layer electrically connects the sides of the chips, which act as grounding surfaces, to a biased or grounded conductive layer on the substrate. The top surfaces of the integrated circuit chips which include the interconnection pads are protected against undesired metallization by a removable protective layer while the metallization layer is applied. Metal electroplated on the metallization layer serves the functions of a heat sink for the chip and a ground plane between chips.
Inventors
- 👤 Robert J. Wojnarowski
- 👤 Charles W. Eichelberger
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 18:50
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/611; H10W70/614; H10W70/67; H10W70/68; H10W70/682; H10W72/00; H10W72/071; H10W72/072; H10W72/07231; H10W72/07236; H10W72/073; H10W72/07331; H10W72/07337; H10W72/30; H10W72/351; H10W72/353; H10W72/354; H10W72/50; H10W72/551; H10W72/552; H10W72/5524
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
123 words
An interconnect system for an integrated circuit chip mounted on a substrate, said chip having an active surface, a mounting surface opposite said active surface, and side surfaces extending between said active and mounting surfaces, said system comprising: a conductive layer on said substrate adapted to be maintained at a predetermined voltage level; a nonconductive adhesive material affixing said mounting surface of said integrated circuit chip to said conductive layer, said nonconductive adhesive material not entirely covering said conductive layer; and a layer of metallization electrically connecting said side surfaces of said integrated circuit chip to said conductive layer, said layer of metallization being sufficiently thick to provide thermal cooling for said integrated circuit chip over substantially the entire thickness of said chip.
Claim 2
Dependent Claim
123 words
An interconnect system for an integrated circuit chip mounted on a substrate, said chip having an active surface, a mounting surface opposite said active surface, and side surfaces extending between said active and mounting surfaces, said system comprising: a conductive layer on said substrate adapted to be maintained at a predetermined voltage level; a nonconductive adhesive material affixing said mounting surface of said integrated circuit chip to said conductive layer, said nonconductive adhesive material not entirely covering said conductive layer; and a layer of metallization electrically connecting said side surfaces of said integrated circuit chip to said conductive layer, said layer of metallization being sufficiently thick to provide thermal cooling for said integrated circuit chip over substantially the entire thickness of said chip.
Claim 3
Dependent Claim
34 words
The integrated circuit chip of claim 1 wherein said nonconductive adhesive material comprises alumina-packed paste positioned on said mounting surface of said integrated circuit chip to enhance heat dissipation from said integrated circuit chip.
Claim 4
Dependent Claim
187 words
An electrical component, comprising: a substrate; first and second integrated circuit chips, each of said chips having an active surface, a mounting surface opposite said active surface, and side surfaces extending between said active and mounting surfaces; a nonconductive adhesive affixing said mounting surfaces of said integrated circuit chips to said substrate; a first voltage bias plane electrically connected to said first integrated circuit chip, said first voltage bias plane comprising a first layer of metallization in electrical contact with said side surfaces of said first integrated circuit chip and extending over exposed portions of said nonconductive adhesive affixed thereto; and a second voltage bias plane electrically connected to said second integrated circuit chip, said second voltage bias plane comprising a second layer of metallization in electrical contact with said side surfaces of said second integrated circuit chip and extending over exposed portions of said nonconductive adhesive affixed thereto, said second voltage bias plane being electrically isolated from said first voltage bias plane; said layers of metallization being sufficiently thick to provide thermal cooling for said integrated circuit chips over substantially the entire thickness of said chips.
Claim 5
Dependent Claim
187 words
An electrical component, comprising: a substrate; first and second integrated circuit chips, each of said chips having an active surface, a mounting surface opposite said active surface, and side surfaces extending between said active and mounting surfaces; a nonconductive adhesive affixing said mounting surfaces of said integrated circuit chips to said substrate; a first voltage bias plane electrically connected to said first integrated circuit chip, said first voltage bias plane comprising a first layer of metallization in electrical contact with said side surfaces of said first integrated circuit chip and extending over exposed portions of said nonconductive adhesive affixed thereto; and a second voltage bias plane electrically connected to said second integrated circuit chip, said second voltage bias plane comprising a second layer of metallization in electrical contact with said side surfaces of said second integrated circuit chip and extending over exposed portions of said nonconductive adhesive affixed thereto, said second voltage bias plane being electrically isolated from said first voltage bias plane; said layers of metallization being sufficiently thick to provide thermal cooling for said integrated circuit chips over substantially the entire thickness of said chips.
Claim 6
Dependent Claim
16 words
The electrical component of claim 3 wherein said first voltage bias plane comprises a ground plane.
Claim 7
Dependent Claim
18 words
An interconnect system in accordance with claim 1 wherein said layer of metallization comprises a titanium/copper dual layer.
Claim 8
Dependent Claim
31 words
An interconnect system in accordance with claim 5 wherein said layer of metallization comprises a 1000 Angstrom thick layer of titanium over laid with a 3000 Angstrom thick layer of copper.
Claim 9
Dependent Claim
18 words
An interconnect system in accordance with claim 1 wherein said layer of metallization comprises a chromium/copper dual layer.
Claim 10
Dependent Claim
30 words
An interconnect system in accordance with claim 7 wherein said layer of metallization comprises a 1000 Angstrom thick layer of chromium overlaid with a 3000 Angstrom thick layer of copper.
Claim 11
Dependent Claim
104 words
An interconnect system for an integrated circuit chip mounted on a substrate, said chip having an active surface, a mounting surface opposite said active surface, and side surfaces extending between said active and mounting surfaces, said system comprising: a nonconductive adhesive material fixing said mounting surface of said integrated circuit chip to said substrate; and a layer of metallization electrically connected to said side surfaces of said integrated circuit chip and adapted to be maintained at a predetermined voltage level, said layer of metallization being sufficiently thick to provide thermal cooling for said integrated circuit chip over substantially the entire thickness of said chip.
Claim 12
Dependent Claim
104 words
An interconnect system for an integrated circuit chip mounted on a substrate, said chip having an active surface, a mounting surface opposite said active surface, and side surfaces extending between said active and mounting surfaces, said system comprising: a nonconductive adhesive material fixing said mounting surface of said integrated circuit chip to said substrate; and a layer of metallization electrically connected to said side surfaces of said integrated circuit chip and adapted to be maintained at a predetermined voltage level, said layer of metallization being sufficiently thick to provide thermal cooling for said integrated circuit chip over substantially the entire thickness of said chip.
Claim 13
Dependent Claim
18 words
An interconnect system in accordance with claim 9 wherein said layer of metallization comprises a titanium/copper dual layer.
Claim 14
Dependent Claim
30 words
An interconnect system in accordance with claim 10 wherein said layer of metallization comprises a 1000 Angstrom thick layer of titanium overlaid with a 3000 Angstrom thick layer of copper.
Claim 15
Dependent Claim
18 words
An interconnect system in accordance with claim 9 wherein said layer of metallization comprises a chromium/copper dual layer.
Claim 16
Dependent Claim
30 words
An interconnect system in accordance with claim 12 wherein said layer of metallization comprises a 1000 Angstrom thick layer of chromium overlaid with a 3000 Angstrom thick layer of copper.
Claim 17
Dependent Claim
32 words
The electrical component of claim 3 wherein said nonconductive adhesive comprises alumina-packed paste positioned on said mounting surfaces of said integrated circuit chips to enhance heat dissipation from said integrated circuit chips.
Claim 18
Dependent Claim
19 words
An interconnect system in accordance with claim 3 wherein said layers of metallization each comprise a titanium/copper dual layer.
Claim 19
Dependent Claim
31 words
An interconnect system in accordance with claim 15 wherein said layers of metallization each comprise a 1000 Angstrom thick layer of titanium overlaid with a 3000 Angstrom thick layer of copper.
Claim 20
Dependent Claim
19 words
An interconnect system in accordance with claim 3 wherein said layers of metallization each comprise a titanium/copper dual layer.
Claim 21
Dependent Claim
31 words
An interconnect system in accordance with claim 17 wherein said layers of metallization each comprise a 1000 Angstrom thick layer of titanium overlaid with a 3000 Angstrom thick layer of copper.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-09-29 | 1996-03-30 | 1996-09-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-09-29 | 2000-03-30 | 2000-09-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-09-29 | 2004-03-30 | 2004-09-29 | $7700.00 | Window Closed / Lapsed |