US5151619A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Cmos off chip driver circuit
Assignee: International Business Machines Corp
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Filing: 1990-10-11
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Granted: 1992-09-29
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Expires: 2010-10-11
Abstract
Abstract A CMOS off-chip driver circuit is provided which includes a P-channel pull up transistor and an N-channel pull down transistor serially arranged between a first voltage source having a supply voltage of a given magnitude and ground with the common point between the transistors forming an output terminal to which is connected a circuit including a second voltage source having a supply voltage of a magnitude significantly greater than that of the given magnitude. A first P-channel field effect transistor is connected between the output terminal and the gate electrode of the pull up transistor. A first input terminal is coupled to the gate electrode of the pull up transistor through a transmission gate including a first N-channel field effect transistor arranged in parallel with a second P-channel field effect transistor, with a gate electrode of the first N-channel transistor being connected to the first voltage source and the gate electrode of the second P-channel transistor being connected to the output terminal.
Inventors
- 👤 John S. Austin
- 👤 Ronald A. Piro
- 👤 Douglas W. Stout
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 20:46
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/003; H03K19/00315; H03K19/02; H03K19/08; H03K19/094; H03K19/0944; H03K19/0948
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
158 words
An off-chip driver circuit comprising a pull up transistor, an output terminal, voltage source means for providing a supply voltage of a given magnitude, said pull up transistor being disposed between said voltage source means and said output terminal, a control transistor connected between a gate electrode of said pull up transistor and said output terminal having a gate electrode connected to a given point of reference potential, a passgate including an N-channel field effect transistor having a gate electrode connected to a fixed point of reference potential and a first P-channel field effect transistor connected in parallel with said N-channel field effect transistor and having a gate electrode connected to said output terminal, pre-driver circuit means for supplying a data in signal coupled to the gate electrode of said pull up transistor through said passgate, and means for selectively applying a voltage to said output terminal having a magnitude significantly greater than that of said given magnitude.
Claim 2
Dependent Claim
158 words
An off-chip driver circuit comprising a pull up transistor, an output terminal, voltage source means for providing a supply voltage of a given magnitude, said pull up transistor being disposed between said voltage source means and said output terminal, a control transistor connected between a gate electrode of said pull up transistor and said output terminal having a gate electrode connected to a given point of reference potential, a passgate including an N-channel field effect transistor having a gate electrode connected to a fixed point of reference potential and a first P-channel field effect transistor connected in parallel with said N-channel field effect transistor and having a gate electrode connected to said output terminal, pre-driver circuit means for supplying a data in signal coupled to the gate electrode of said pull up transistor through said passgate, and means for selectively applying a voltage to said output terminal having a magnitude significantly greater than that of said given magnitude.
Claim 3
Dependent Claim
22 words
An off-chip driver circuit as set forth in claim 1 wherein said given point of reference potential is substantially said supply voltage.
Claim 4
Dependent Claim
21 words
An off-chip driver circuit as set forth in claim 1 wherein said fixed point of reference potential is said supply voltage.
Claim 5
Dependent Claim
43 words
An off-chip driver circuit as set forth in claim 1 further including a semiconductor substrate including an N-well supporting said transistors and means including a second P-channel field effect transistor for biasing said N-well having a gate electrode coupled to said output terminal.
Claim 6
Dependent Claim
24 words
An off-chip driver circuit as set forth in claim 1 wherein said pull up transistor and said control transistor are P-channel field effect transistors.
Claim 7
Dependent Claim
186 words
An off-chip driver circuit comprising a pull up transistor, a pull down transistor, voltage source means for providing a supply voltage of a given magnitude, said pull up transistor and said pull down transistor being serially connected between said voltage source means and a point of reference potential, an output terminal connected to a common point between said transistors, a control transistor connected between a gate electrode of said pull up transistor and said output terminal having a gate electrode connected to a point of reference potential having a voltage magnitude equal to about that of said given magnitude, a transmission gate including an N-channel field effect transistor having a gate electrode connected to said supply voltage and a P-channel field effect transistor having a gate electrode connected to said output terminal, pre-driver circuit means for supplying data in signals coupled to the gate electrode of said pull up transistor through said transmission gate and to a gate electrode of said pull down transistor, and means for selectively applying a voltage to said output terminal having a magnitude significantly greater than that of said given magnitude.
Claim 8
Dependent Claim
186 words
An off-chip driver circuit comprising a pull up transistor, a pull down transistor, voltage source means for providing a supply voltage of a given magnitude, said pull up transistor and said pull down transistor being serially connected between said voltage source means and a point of reference potential, an output terminal connected to a common point between said transistors, a control transistor connected between a gate electrode of said pull up transistor and said output terminal having a gate electrode connected to a point of reference potential having a voltage magnitude equal to about that of said given magnitude, a transmission gate including an N-channel field effect transistor having a gate electrode connected to said supply voltage and a P-channel field effect transistor having a gate electrode connected to said output terminal, pre-driver circuit means for supplying data in signals coupled to the gate electrode of said pull up transistor through said transmission gate and to a gate electrode of said pull down transistor, and means for selectively applying a voltage to said output terminal having a magnitude significantly greater than that of said given magnitude.
Claim 9
Dependent Claim
36 words
An off-chip driver circuit as set forth in claim 6 wherein said pull up transistor and said control transistor are P-channel field effect transistors and said pull down transistor is a first N-channel field effect transistor.
Claim 10
Dependent Claim
204 words
A CMOS driver comprising a first P-channel field effect transistor, a first N-channel field effect transistor, voltage source means for providing a supply voltage having a given magnitude, said first P-channel and said first N-channel transistors being serially connected between said voltage source means and a point of reference potential, an output terminal connected to a common point between said first P-channel transistor and said first N-channel transistor, a second P-channel field effect transistor connected between a gate electrode of said first P-channel transistor and said output terminal, first and second input terminals, said first input terminal being coupled to a gate electrode of said first N-channel transistor, means for applying data in signals to said first and second input terminals, a second N-channel field effect transistor coupling said second input terminal to the gate electrode of said first P-channel transistor, gate electrodes of said second N-channel transistor and said second P-channel transistor being connected to points of fixed potential, a third P-channel field effect transistor connected in parallel with said second N-channel transistor having a gate electrode connected to said output terminal, and means for selectively applying a voltage to said output terminal having a magnitude greater than that of said given magnitude.
Claim 11
Dependent Claim
204 words
A CMOS driver comprising a first P-channel field effect transistor, a first N-channel field effect transistor, voltage source means for providing a supply voltage having a given magnitude, said first P-channel and said first N-channel transistors being serially connected between said voltage source means and a point of reference potential, an output terminal connected to a common point between said first P-channel transistor and said first N-channel transistor, a second P-channel field effect transistor connected between a gate electrode of said first P-channel transistor and said output terminal, first and second input terminals, said first input terminal being coupled to a gate electrode of said first N-channel transistor, means for applying data in signals to said first and second input terminals, a second N-channel field effect transistor coupling said second input terminal to the gate electrode of said first P-channel transistor, gate electrodes of said second N-channel transistor and said second P-channel transistor being connected to points of fixed potential, a third P-channel field effect transistor connected in parallel with said second N-channel transistor having a gate electrode connected to said output terminal, and means for selectively applying a voltage to said output terminal having a magnitude greater than that of said given magnitude.
Claim 12
Dependent Claim
21 words
A CMOS driver as set forth in claim 8 wherein said fixed potential is a voltage of approximately said given magnitude.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1995-09-29 | 1996-03-30 | 1996-09-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1999-09-29 | 2000-03-30 | 2000-09-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2003-09-29 | 2004-03-30 | 2004-09-29 | $7700.00 | Window Closed / Lapsed |