Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
337 words
An image processing system for reproducing a small-sized picture scaled down from an original picture, comprising: a) a scale-down unit supplied with pieces of first video data information indicative of parts of said original picture corresponding to a plurality of lines of a screen, respectively, and producing a piece of second video data information indicative of a part of said small-sized picture on a single line of aid screen, said pieces of fist video data information being sampled at respective first predetermined timings; b) a line memory unit supplied from said scale-down unit with said piece of second video data information for temporarily memorizing thereinto and allowing said piece of second video data information to be read out therefrom; and c) a field memory unit supplied from said line memory unit with pieces of second video data information indicative of said small-sized picture for temporarily memorizing thereinto and allowing said pieces of second video data information to be read out therefrom at respective second predetermined timings repeated at intervals shorter than those of said first predetermined timings, wherein said scale-down unit comprises a-1) a switching circuit having an input port supplied with said pieces of first video data information and distributing said pieces of first video information to a plurality of output ports thereof, respectively, a-2) a plurality of line memory circuits respectively coupled to said plurality of output ports except for one of said output ports and memorizing said pieces of first video data information, respectively, and a-3) an averaging circuit coupled to said line memory circuits and said one of said output ports and operative to average values respectively represented by said pieces of first video data information so as to calculate a weighted average for determining the value represented by said piece of second video data information, one of said pieces of first video data information at the center of said plurality of output ports being weighted by a factor larger than those of the other of said pieces of first video data information.
Claim 2
Dependent Claim
337 words
An image processing system for reproducing a small-sized picture scaled down from an original picture, comprising: a) a scale-down unit supplied with pieces of first video data information indicative of parts of said original picture corresponding to a plurality of lines of a screen, respectively, and producing a piece of second video data information indicative of a part of said small-sized picture on a single line of aid screen, said pieces of fist video data information being sampled at respective first predetermined timings; b) a line memory unit supplied from said scale-down unit with said piece of second video data information for temporarily memorizing thereinto and allowing said piece of second video data information to be read out therefrom; and c) a field memory unit supplied from said line memory unit with pieces of second video data information indicative of said small-sized picture for temporarily memorizing thereinto and allowing said pieces of second video data information to be read out therefrom at respective second predetermined timings repeated at intervals shorter than those of said first predetermined timings, wherein said scale-down unit comprises a-1) a switching circuit having an input port supplied with said pieces of first video data information and distributing said pieces of first video information to a plurality of output ports thereof, respectively, a-2) a plurality of line memory circuits respectively coupled to said plurality of output ports except for one of said output ports and memorizing said pieces of first video data information, respectively, and a-3) an averaging circuit coupled to said line memory circuits and said one of said output ports and operative to average values respectively represented by said pieces of first video data information so as to calculate a weighted average for determining the value represented by said piece of second video data information, one of said pieces of first video data information at the center of said plurality of output ports being weighted by a factor larger than those of the other of said pieces of first video data information.
Claim 3
Dependent Claim
111 words
An image processing system as set forth in claim 1, in which said averaging circuit comprises: a first array of full adders supplied with a first predetermined number of said pieces of first video data information corresponding to said first predetermined number of lines selected from said plurality of lines of said screen for producing a first sum, and a second array of full adders supplied with said first sum and at least one of said pieces of first video data information corresponding to at least one of the remaining lines of said screen for producing a second sum indicative of the value of said piece of second video data information.
Claim 4
Dependent Claim
19 words
An image processing system as set forth in claim 1, in which said averaging circuit calculates an arithmetic means.
Claim 5
Dependent Claim
296 words
A visual information storage for reproducing a subpicture over a main picture reproduced throughout a screen, comprising: an (n:1) processing circuit supplied with pieces of first video data information indicative of parts of an original picture on n lines of said screen, respectively, and operative to produce a piece of second video data information indicative of a part of said subpicture on a single line, n being a natural number greater than one; a line memory unit temporarily memorizing said piece of second video data information and allowing said piece of second video data information to be read out at a first predetermined timing; and a field memory unit memorizing pieces of said second video data information indicative of said subpicture for scale down said original picture and operative to allow each of said pieces of second video data information indicative of a part of said subpicture on a single line to be read out at a second predetermined timing different from said first predetermined timing, said (n:1) processing circuit comprising: a switching circuit having n output ports and distributing pieces of first video data information to said output ports, respectively, n-1 line memory circuits respectively coupled to n-1 output ports selected from said n output ports and temporarily memorizing n-1 pieces of first video data information, each of said line memory circuits storing each of said n-1 pieces of first video data information indicative of a part of said original image on a single line, and an averaging circuit supplied with said n pieces of first video data information directly from the nth output port and through said n-1 line memory circuits and supplying said piece of second video data information produced through an averaging operation on said n pieces of first video data information.
Claim 6
Dependent Claim
296 words
A visual information storage for reproducing a subpicture over a main picture reproduced throughout a screen, comprising: an (n:1) processing circuit supplied with pieces of first video data information indicative of parts of an original picture on n lines of said screen, respectively, and operative to produce a piece of second video data information indicative of a part of said subpicture on a single line, n being a natural number greater than one; a line memory unit temporarily memorizing said piece of second video data information and allowing said piece of second video data information to be read out at a first predetermined timing; and a field memory unit memorizing pieces of said second video data information indicative of said subpicture for scale down said original picture and operative to allow each of said pieces of second video data information indicative of a part of said subpicture on a single line to be read out at a second predetermined timing different from said first predetermined timing, said (n:1) processing circuit comprising: a switching circuit having n output ports and distributing pieces of first video data information to said output ports, respectively, n-1 line memory circuits respectively coupled to n-1 output ports selected from said n output ports and temporarily memorizing n-1 pieces of first video data information, each of said line memory circuits storing each of said n-1 pieces of first video data information indicative of a part of said original image on a single line, and an averaging circuit supplied with said n pieces of first video data information directly from the nth output port and through said n-1 line memory circuits and supplying said piece of second video data information produced through an averaging operation on said n pieces of first video data information.