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US5141885A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of fabrication of thin film transistors

Assignee: Panasonic Holdings Corp
•
Filing: 1991-06-03
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Granted: 1992-08-25
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Expires: 2011-06-03
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Abstract

Abstract A method of fabricating a thin film transistor on an insulating substrate such as quartz or glass without defect in the channel region in semiconductor thin layer, or at the boundary between the semiconductor thin layer and gate insulation layer, but with high mobility and high integration. For that purpose, ions produced by the discharge-decomposition of a hydride gas including dopant are accelerated and implanted into the semiconductor thin layer, wherein the protecting insulation layer for protection of the channel region is of a thickness larger than the projected range of the hydrogen ion.

Inventors

  • 👤 Akihisa Yoshida
  • 👤 Masatoshi Kitagawa
  • 👤 Takashi Hirao

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 13:52
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0316; H10D30/0321; H10D30/60; H10D30/67; H10D30/6729; H10D30/673; H10D30/6732; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6746; H10P; H10P32/00; H10P32/10; H10P32/12; H10P32/1204

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 109 words
A method of fabricating a thin film transistor including a channel region and source and drain regions, comprising the steps of: forming and depositing in order on an insulating substrate, a gate electrode, a gate insulation layer, and a semiconductor thin film of amorphous silicon, and forming the source and drain regions by accelerating and implanting ions, produced by discharge-decomposition of a doping hydride gas and a diluting gas, into the semiconductor layer on which a protecting insulation layer is formed over the channel region characterized in that the thickness of the protecting insulation layer is larger than a projected range of hydrogen ions in the protecting insulation layer.
Claim 2
Independent Claim 109 words
A method of fabricating a thin film transistor including a channel region and source and drain regions, comprising the steps of: forming and depositing in order on an insulating substrate, a gate electrode, a gate insulation layer, and a semiconductor thin film of amorphous silicon, and forming the source and drain regions by accelerating and implanting ions, produced by discharge-decomposition of a doping hydride gas and a diluting gas, into the semiconductor layer on which a protecting insulation layer is formed over the channel region characterized in that the thickness of the protecting insulation layer is larger than a projected range of hydrogen ions in the protecting insulation layer.
Claim 3
Dependent Claim 23 words
A method of fabricating a thin film transistor according to claim 1, characterized in that the protecting insulation layer comprises an insulator layer.
Claim 4
Dependent Claim 23 words
A method of fabricating a thin film transistor according to claim 1, characterized in that the protecting insulation layer comprises a photoresist layer.
Claim 5
Dependent Claim 30 words
A method of fabricating a thin film transistor according to claim 1, characterized in that the protecting insulation layer comprises a deposited layer of an insulator layer and photoresist layer.
Claim 6
Dependent Claim 22 words
A method of fabricating a thin film transistor according to claim 1, characterized in that the diluting gas comprises hydrogen or helium.

References Cited (Backward Citations)

US4169740A Cited
US4859908A Cited
US4998152A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-08-25 1996-02-24 1996-08-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-08-25 2000-02-24 2000-08-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-08-25 2004-02-24 2004-08-25 $7700.00 Window Closed / Lapsed

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